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Description: this matlab code presents a ofdm digital predistorter using lut method and a saleh model for the power amplifier-this matlab code presents a ofdm digital predistorter using lut method and a saleh model for the power amplifier
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Size: 6144 |
Author: shi |
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Description: verilog design of lut sr random number generator
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Size: 676864 |
Author: senthilraj |
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Description: FIR filter LUT based in vhdl
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Size: 217088 |
Author: sat |
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Description: Image compression is one of the prominent topics in image processing that plays a very important role in
reducing image size for real-time transmission and storage. Many of the standards recommend the use of DWT
for image compression. The computational complexity of DWT imposes a major challenge for the real-time use
of DWT-based image compression algorithms. In this paper, we propose a modified lifting scheme for
computing the approximation and detailed coefficients of DWT. The modified equations use, right shift
operators and 6-bit multipliers. The hierarchy levels in computation are reduced to one thereby minimizing the
delay and increasing throughput. The design implemented on Virtex-5 FPGA operates at 180 MHz and
consumes less than 1W of power. The design occupies less than 1 of the LUT resources on FPGA. The
architecture developed is suitable for real-time image processing on FPGA platform.
-Image compression is one of the prominent topics in image processing that plays a very important role in
reducing image size for real-time transmission and storage. Many of the standards recommend the use of DWT
for image compression. The computational complexity of DWT imposes a major challenge for the real-time use
of DWT-based image compression algorithms. In this paper, we propose a modified lifting scheme for
computing the approximation and detailed coefficients of DWT. The modified equations use, right shift
operators and 6-bit multipliers. The hierarchy levels in computation are reduced to one thereby minimizing the
delay and increasing throughput. The design implemented on Virtex-5 FPGA operates at 180 MHz and
consumes less than 1W of power. The design occupies less than 1 of the LUT resources on FPGA. The
architecture developed is suitable for real-time image processing on FPGA platform.
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Size: 1474560 |
Author: jeason |
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Description: 查找表（Look-Up-Table)简称为LUT，LUT本质上就是一个RAM。它把数据事先写入RAM后，每当输入一个信号就等于输入一个地址进行查表，找出地址对应的内容，然后输出。本程序是LUT的C语言实现。-Lookup Table (Look-Up-Table) referred to as LUT, LUT is essentially a RAM. After which the data prior written RAM, whenever the input signal is equal to input an address look-up table, find the corresponding address, and then output. This program is a LUT C language.
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Size: 3072 |
Author: 王润生 |
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Description: 为满足精细、短时天气预报的需求, 我国地面自动站( AWS) 观测系统的建设日趋完善。AWS
资料在数值预报系统中没得到充分使用的原因之一是AWS 观测资料的特殊性及数值预报系统缺少有
效针对AWS 观测资料的质量控制( QC) 方案。-With the enhancement of the meteorolo gical o bser vation system in China, the Automatic
surface Weather observat ion System ( AWS) is coming into the perfect condit ion. Local AWS netw ork
has been setup in many areas and much attent ion has been paid to the applicat ion of AWS data. Somehow,
data quality tur ns to be one of the roadblock in the w ays of AWS data applicat ion. In or der to fulfill the
funct ion of AWS data bet ter, a feasible observat ion data quality co nt ro l module should be designed to
make sure AWS data that used in the meteo rolog ical r esearch and o peration w ith a higher quality. The
AWS QC module in this paper consult the advantag e of other AWS Q C module of adv ance count ries and is
bro ug ht forw ard consult ing the char acteristic of AWS and the requirement of the high reso lut ion Numer ical
Weather Pr edict io n( NWP) operat ional mo del.
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Size: 428032 |
Author: wanggen |
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Description: avivo crtc load lut for Linux v2.13.6.
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Size: 12288 |
Author: zonhunpai |
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Description: Manage the LUT for an output.
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Size: 1024 |
Author: ghqbye |
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Description: For OMAP5, a fixed offset is added to all Y coordinates for 1D buffers. This is used in programming to address the upper portion of the LUT.
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Size: 2048 |
Author: xttsfe |
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Description: verilog查找表功能的实现，基本的查找表功能，可以作为编写查找表的参考-verilog lookup table functions to achieve the basic function lookup table can be used as reference for the preparation of a lookup table
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Size: 4298752 |
Author: 李九阳 |
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Description: Predistortion technique with LUT for PAPR reduction
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Size: 88064 |
Author: djamel |
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Description: 这是为sapera系列相机写的实现LUT功能的程序，比较实用，大家可以学一下-it is useful to relize the lut function，so we can study it
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Size: 34816 |
Author: 张杰 |
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Description: 本压缩文件包含利用LUT（查找表）进行MODIS气溶胶反演的系统、源代码及说明文档
源代码为idl的pro文件,易于学习查看
还附赠了6s大气传输模型用以生成查找表（LUT）之用
-Modis 6s.
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Size: 136192 |
Author: Hekpoxa |
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Description: lut based channel code
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Size: 415744 |
Author: Anand |
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Description: playit: Play a given game, handling all the curses commands the driver.
-playit: Play a given game, handling all the curses commands the driver.
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Size: 4096 |
Author: keipmtao |
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Description: 使用verliog设计实现LUT查找表乘法器，通过modelsim仿真验证通过-Designed and implemented using the LUT lookup table verliog multipliers, through simulation by modelsim
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Size: 141312 |
Author: 吴刚 |
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Description: 在holcon使用高斯混合模型的查阅表对颜色进行分类-In this example five different color fuses are segmented with
a look-up table classifier (LUT) based on a Gaussian Mixture
Model (GMM).
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Size: 2048 |
Author: ZhangCJ |
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Description: Turbo codes have recently been considered for
energy-constrained wireless communication applications, since they facilitate a low transmission energy consumption. How-
ever, in order to reduce the overall energy consumption, lookup table-log-BCJR (LUT-Log-BCJR) architectures having a low
processing energy consumption are required. In this paper, Authors decompose the LUT-Log-BCJR architecture into its most funda-
mental add compare (ACS) operations and perform them using a novel low-complexity ACS unit. We demonstrate that the proposed
architecture employs an order of magnitude fewer gates than the most recent LUT-Log-BCJR architectures, facilitating a 71 energy consumption reduction. Compared to state-of-the-art maximum logarithmic Bahl-Cocke-Jelinek-Raviv implementations, proposed approach facilitates a 10 reduction in the overall energy consumption at ranges above 58 m.-Turbo codes have recently been considered for
energy-constrained wireless communication applications, since they facilitate a low transmission energy consumption. How-
ever, in order to reduce the overall energy consumption, lookup table-log-BCJR (LUT-Log-BCJR) architectures having a low
processing energy consumption are required. In this paper, Authors decompose the LUT-Log-BCJR architecture into its most funda-
mental add compare (ACS) operations and perform them using a novel low-complexity ACS unit. We demonstrate that the proposed
architecture employs an order of magnitude fewer gates than the most recent LUT-Log-BCJR architectures, facilitating a 71 energy consumption reduction. Compared to state-of-the-art maximum logarithmic Bahl-Cocke-Jelinek-Raviv implementations, proposed approach facilitates a 10 reduction in the overall energy consumption at ranges above 58 m.
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Size: 1361920 |
Author: oudjani |
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Description: 对MODIS反演时，建立所需的查找表LUT用于查找相应值得程序-IDL look up table
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Size: 1024 |
Author: 羊 |
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Description: 32位输入，12位输出的nco代码及tb。包含查找表-32bit input and 12bit output nco and its tb.including lut.
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Size: 201728 |
Author: 尚文 |
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