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[Windows Develop] Desktop

Description: It is 4 bit updown counter
Platform: | Size: 25600 | Author: Pratik | Hits:

[SCM] scorecounter

Description: yong 89s52 zhizuo de lanqiu jifenpai,yong KEIL he PROTUES da kai.-A basketball score counter sysrem ,use 89s52 as mcu.
Platform: | Size: 27648 | Author: zxw | Hits:

[Windows Develop] counter

Description: 自写的一个ip计数器类，使用二进制文件存储，不用数据库，自动筛除重复ip-ip counter using binary file as DB storage, records unique ip only
Platform: | Size: 1024 | Author: alaphate | Hits:

[Embeded-SCM Develop] counter

Description: 51单片机相关驱动程序 51单片机最小系统测试程序-51 SCM related to the smallest single-chip driver system 51 test procedure
Platform: | Size: 25600 | Author: wuyu | Hits:

[J2ME] J2ME-MyCS

Description: j2me平台上的一个手机小游戏 2d版的cs 可以用来熟悉一下j2me环境-a small game of mobile phone on the j2me platform, like classic game, counter-strike
Platform: | Size: 92160 | Author: 梁文章 | Hits:

[Software Engineering] VHDL

Description: 在电子技术中，频率是最基本的参数之一，又与许多电参量的测量方案、测量结果都有十分密切的关系，因此频率的测量就显得更为重要。测量频率的方法有多种,其中电子计数器测量频率具有精度高、使用方便、测量迅速，以及便于实现测量过程自动化等优点，是频率测量的重要手段之一。在本次毕业设计中我们选择使用单片机来制作数字频率计，并在实际制作中采用了直接测频法。利用延时产生的时基门控信号来控制闸门，通过在单位时间内计数器记录下的脉冲个数计算出输入信号的频率，最终送入LCD中显示。这样制作出来的频率计不仅可以满足设计题目的参数要求，而且具有了单片机的稳定性和成熟性，且控制能力强，是一种低成本，高可靠的设计方案。-In electronic technology, the frequency is one of the most basic parameters, but also with a number of electrical parameters of the measurement program, the measurement results have a very close relationship between the frequency of measurement, therefore it is even more important. Measurement of the frequency of a number of means, electronic measurement of the frequency counter with high precision, easy to use, rapid measurement, and measurement is easy to realize the advantages of process automation is an important means of measuring the frequency of one. Graduates in this design we have chosen to make use of single-chip digital frequency meter, and used in the actual production of a direct frequency measurement method. Delay arising from the use of gated time-base signal to control the gate time in units of the pulse counter to record the number of calculated frequency of the input signal, and ultimately into the LCD display. This produced not only the frequency of the parameters to
Platform: | Size: 220160 | Author: 张林锋 | Hits:

[VHDL-FPGA-Verilog] VHDL16bitcouner

Description: 利用VHDL编写的一个简单的16位计数器-VHDL prepared using a simple 16-bit counter
Platform: | Size: 179200 | Author: jian | Hits:

[SCM] dingshijishu

Description: pic单片机定时器和计数器的初始化程序，定时器0定时100ms，计数器T1计数外部脉冲个数，查寻方式-Single-chip timers and counters pic initialization procedure, Timer 0 Timing 100ms, external pulse counter counts the number of T1, search methods
Platform: | Size: 1024 | Author: 张吉卫 | Hits:

[Other Embeded program] MSP430_EventCounter

Description: Event counter for MSP430 - multi channel and real fast using latched interrupts.-Event counter for MSP430- multi channel and real fast using latched interrupts.
Platform: | Size: 4096 | Author: anakron | Hits:

[GIS program] Register

Description: -- Universal Register -- This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter. -- The register can be loaded from a set of parallel data inputs and the mode is controlled by a 3-bit input. -- The termcnt (terminal count) output goes high when the register contains zero. -- download from: www.fpga.com.cn & www.pld.com.cn--- Universal Register -- This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter. -- The register can be loaded from a set of parallel data inputs and the mode is controlled by a 3-bit input. -- The termcnt (terminal count) output goes high when the register contains zero. -- download from: www.fpga.com.cn & www.pld.com.cn
Platform: | Size: 4096 | Author: djs | Hits:

[MPI] counter

Description: 运用VHDL语言实现的，功能是实现可控计数器。-The use of VHDL language, the function is to achieve controllable counter.
Platform: | Size: 5120 | Author: 吴伟 | Hits:

[VHDL-FPGA-Verilog] UpDownCounter

Description: an up down counter in verilog
Platform: | Size: 415744 | Author: ash | Hits:

[VHDL-FPGA-Verilog] counter

Description: It s a binary counter
Platform: | Size: 1024 | Author: gegry | Hits:

[Windows Develop] Counter

Description: 计数器，处用LABVIWE软件实现计数器的功能能让人快速了解VI的制作-Counters, Department LABVIWE software with the function of counter can be quick to understand the production of VI
Platform: | Size: 11264 | Author: ujn | Hits:

[Other] 8051_counter0

Description: Measure Humidity using frequency counter
Platform: | Size: 10240 | Author: yes_no_in | Hits:

[Game Program] Counter

Description: 基本的计算器原理，详细地解释 给 初学者很好的指引，-basic counter method , it is good for new users to study and develop it
Platform: | Size: 2048 | Author: HJ | Hits:

[VHDL-FPGA-Verilog] bcd

Description: EDA 十进制计数器、BCD VHDL源代码-EDA decimal counter VHDL source code
Platform: | Size: 1024 | Author: 啊毛 | Hits:

[Other Embeded program] UP.DOWN.HEX.COUNTER

Description: Up down counter for microchip ASM code tested
Platform: | Size: 33792 | Author: mustafa | Hits:

[Other Embeded program] 8254

Description: 82C54 counter programming
Platform: | Size: 2048 | Author: vinay | Hits:

[VHDL-FPGA-Verilog] counter

Description: 这是用VHDL设计的十进制计数器，两个VHDL程序分别说明了out和buffer的区别-It is designed with VHDL decimal counter, the two VHDL procedures were illustrated the difference between out and buffer
Platform: | Size: 324608 | Author: 田怡 | Hits:
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