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[Embeded-SCM Develop] cortexm1 VHDL 源码

Description: 基于ACTEL公司最新的FPGA 开发板 fusion系列的 处理器CORTEXM1的顶层文件
Platform: | Size: 2426 | Author: zhaoleiqd@163.com | Hits:

[Other] Libero8.5快速入门

Description: Actel公司FPGA集成开发环境libero8快速入门
Platform: | Size: 2625086 | Author: mmangtou@tom.com | Hits:

[VHDL-FPGA-Verilog] fpga加密设计方法

Description: FPGA加密的方法，对于那些需要加密自己的vhdl源代码的人来说，很有用-FPGA encryption methods for those who need to encrypt their VHDL source code in a way, very useful
Platform: | Size: 187392 | Author: 陶伟炯 | Hits:

[Books] vgavhdl

Description: vga显示驱动,在EDA中实现对VGA显示器的驱动控制。-vga display driver, in EDA to achieve VGA display drive control.
Platform: | Size: 111616 | Author: 陈利锋 | Hits:

[Other Embeded program] pspSDK

Description: psp游戏机上的SDK的开发例子，包括了2D,3D图形界面开发，声音的开发，WiFi，USB,debug串口，文件读写，sony光盘的读写-psp games on the development of the SDK examples, including 2D, 3D graphics interface development, Development of voice, WiFi, USB, serial debug, document literacy, sony CD-writable
Platform: | Size: 1215488 | Author: li | Hits:

[Other] Synplify

Description: Synplify工具使用指南(华为文档),Synplify快速入门和Synplify工具使用指南，介绍详细为华为使用文档-Synplify tool Guide (Huawei document) Synplify and Synplify Quick Start guide to the use of tools on the use of detailed documentation for Huawei
Platform: | Size: 530432 | Author: 袁汇 | Hits:

[SCM] jtag

Description: fpga jtag 接口pcb图,参考下-fpga jtag interface pcb diagram, refer to the following
Platform: | Size: 46080 | Author: 王天 | Hits:

[VHDL-FPGA-Verilog] jtag.tar

Description:
Platform: | Size: 338944 | Author: dc | Hits:

[Com Port] testuart2

Description: verilog语言，硬件调试，用于actel刚推出的fusion系列芯片的接口调试-Verilog language, the hardware debugger for Actel recently launched series of fusion-chip debug interface
Platform: | Size: 356352 | Author: yangzhendong | Hits:

[VHDL-FPGA-Verilog] UART_send

Description: Verilog HDL 串口发送程序，在ACTEL Fusion FPGA上实验成功 ，和大家一起分享！^_^-Verilog HDL send serial procedures, ACTEL Fusion FPGA in the success of the experiment, and share with everyone! ^ _ ^
Platform: | Size: 1024 | Author: whq | Hits:

[VHDL-FPGA-Verilog] Time

Description: ALTERA上DE2平台，利用内部50M Hz时钟，在数码管模拟显示时间(时分秒)。-ALTERA on DE2 platform, using internal 50M Hz clock, in the digital control simulation show time (hours minutes and seconds).
Platform: | Size: 609280 | Author: 徐朝凯 | Hits:

[VHDL-FPGA-Verilog] BCD_digit

Description: 基于Actel的VHDL编程，实现BCD功能源代码-Based on Actel
Platform: | Size: 1024 | Author: 曾捷 | Hits:

[Compress-Decompress algrithms] Static_PLL

Description: 静态pll实验程序，在actel的fusion系列FPGA中综合通过-Pll static experimental procedures, the fusion line in the Actel FPGA integrated through
Platform: | Size: 209920 | Author: luocaijin | Hits:

[Linux-Unix] DP_RAM_lab

Description: 用SmartGen 生成一个2k*8 Dual Port RAM，并通过串口发送数据初始化RAM。然后通过串口返回到上位机的串口调试程序显示。-SmartGen generated using a 2k* 8 Dual Port RAM, and sending data through the serial port to initialize RAM. And back through the serial port to the PC serial port debugger display.
Platform: | Size: 4096 | Author: 劳杰勇 | Hits:

[Embeded-SCM Develop] A3P030FPGAl602LCD

Description: 利用actel公司的proasic3系列FPGA A3P030,VHDL编程,实现对LCD模块1602C的显示控制.已经调试通过.已经形成模版,可以进一步使用开发.-Actel companies use proasic3 series FPGA A3P030, VHDL programming, implementation of the LCD display control module 1602C.Has debugging. Has become the template, you can use to develop further.
Platform: | Size: 2048 | Author: sprlei | Hits:

[VHDL-FPGA-Verilog] my_and

Description: 此实验例程适用于Actel Flash架构的ProASIC3/E系列FPGA，适合于FPGA及Verilog HDL的初学者，配套EasyFPGA030开发套件。-Routine application of this experiment in the Actel Flash architecture ProASIC3/E series FPGA, fit in the FPGA and Verilog HDL for beginners and supporting development kit EasyFPGA030.
Platform: | Size: 902144 | Author: 李平 | Hits:

[Other] core8051_lcd1602

Description: 基于Fusion系列AFS600的FPGA的51核，在板子上试过，可以对51核写1602的显示程序，就可以显示了，也可以写其他的51程序。-AFS600-based Fusion Series of FPGA 51 nuclear, tried on the board, you can write 1602 on 51 of the display of the nuclear program, we can show that we can process other 51.
Platform: | Size: 14685184 | Author: 冰鸟 | Hits:

[VHDL-FPGA-Verilog] RTC_Test_Top

Description: 用Actel公司的Fusion系列FPGA开发的RTC实验程序-With Actel' s Fusion Series FPGA development of experimental procedures RTC
Platform: | Size: 1024 | Author: 毕京鹏 | Hits:

[VHDL-FPGA-Verilog] hdl

Description: 用Actel公司的Fusion系列FPGA开发的LCD实验程序-Fusion with Actel s FPGA development series LCD Experimental procedures
Platform: | Size: 3072 | Author: 毕京鹏 | Hits:

[Software Engineering] spaceguide_PIB

Description: 本资料是从ACTEL得到的有关军品所有产品的选型手册。-Actel Space Guide
Platform: | Size: 855040 | Author: 贾存玉 | Hits:
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