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关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.-FPGA pipelined designs on paper This work investigates the use of very deep pipelines forimplementing circuits in FPGAs, where each pipelinestage is limited to a single FPGA logic element (LE). Thearchitecture and VHDL design of a parameterized integerarray multiplier is presented and also an IEEE 754compliant 32-bit floating-point multiplier. We show how towrite VHDL cells that implement such approach, and howthe array multiplier architecture was adapted. Synthesisand simulation were performed for Altera Apex20KEdevices, although the VHDL code should be portable toother devices. For this family, a 16 bit integer multiplierachieves a frequency of 266MHz, while the floating pointunit reaches 235MHz, performing 235 MFLOPS in anFPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and otherconsiderations to apply the technique in real designs arealso addressed.
Date : 2025-12-16 Size : 175kb User : 李中伟

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关于硬件平台实现乘法器的构架的书,不错哦。-On the hardware platform to achieve the framework of multiplier book, oh well.
Date : 2025-12-16 Size : 291kb User : long

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讲在乘法器实现当中应用最多的wallace树比较好的网上资料-Stresses in the multiplier to achieve the most widely used among the wallace tree better online information
Date : 2025-12-16 Size : 159kb User : long

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:在FPGA 上实现了对高频窄带数字信号的下变频和取样率转换,由于完全避免了需要大量逻辑资源的乘法 器和数字振荡器,其结构大为简化,再加上采用了流水处理结构,使其处理速度超过100M 样点每秒,此外它还具有 结构简单,重配置能力强的优点,具有广阔的应用前景-: In the FPGA to achieve the high-frequency narrow-band digital signal of the down-conversion and sampling rate conversion, due to completely avoid the need for a large number of logic resources and digital multiplier oscillator, greatly simplifying its structure, coupled with the use of water to deal with the structure of its processing speed of more than 100M samples per second, in addition to simple structure, strong ability to re-configure the merits, has broad application prospects
Date : 2025-12-16 Size : 272kb User : 赵平

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v512工作室在java高端视频教学中最牛的,将课件与视频结合学习,事半功倍-v512 studio in high-end java video teaching the most cattle will combine learning courseware and video, a multiplier
Date : 2025-12-16 Size : 1.58mb User : titer2008

学习vb的进本的例子,通过此例子,对初学者可以起到事半功倍的效果-Learning vb examples of this approach, the passage of this example, the beginner can play a multiplier effect
Date : 2025-12-16 Size : 4.26mb User : dianlian

学习vb的数据库开发书籍,通过该书,对初学者可以起到事半功倍的效果-Learning vb database development books, through the book, for beginners can play a multiplier effect
Date : 2025-12-16 Size : 2.62mb User : dianlian

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定点八位乘法器的原理图设计,已通过功能仿真!-8 fixed-point multiplier schematic design, functional simulation has passed!
Date : 2025-12-16 Size : 403kb User : lxp

如何攻击电脑,如何成为电脑高手 天外有天,人外有人,这是你成为黑客的 捷径!得到它,对于你成为电脑高手,已经起到事半功倍的效果-How to attack a computer, how to become a computer expert天外有天people, some people outside, this is your shortcut to become a hacker! Get it for you to become a computer expert, has played a multiplier effect
Date : 2025-12-16 Size : 15.89mb User : 小我

TMS320VC5416的主要特征有: (1)优化的CPU结构:增强的多总线结构,数据总线具有总线保持特性;40bit的算术逻辑单元(ALU),包括两个独立的40bit的累加器,一个40bit的桶形移位器;一个17×17的乘法器连接一个40bit专用加法器,可用来进行非流水线式的单周期乘/累加(MAC)操作等。 -The main features of the TMS320VC5416 are: (1) to optimize the structure of the CPU: Enhanced multi-bus architecture, data bus has a bus to maintain properties 40bit arithmetic logic unit (ALU), including the two independent 40bit accumulator, a Barrel shifter of 40bit a multiplier of 17 × 17 to connect a dedicated 40bit adder that can be used to carry out non-pipelined single-cycle by/accumulate (MAC) operation.
Date : 2025-12-16 Size : 687kb User : wshh

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《EDA技术实用教程》实验选编 专题一:计数分频器设计 4 专题二:存储器定制 7 实验一:快速乘法器电路设计 11 实验二:高速数字相关器设计 17 实验三:TLC5510高速A/D转换器控制 21 实验四:直接数字频率合成器(DDFS)设计 23 实验五:基于直接数字频率合成技术的任意波形发生器-" EDA technology practical course" Selected experimental one topic: the design count crossovers feature 4 2: 7 experiment a custom memory: Fast multiplier circuit design of 11 experiments II: the design of high-speed digital correlator 17, the experiment three: TLC5510 high-speed A/D converter control 21 of the experiment four: Direct Digital Frequency Synthesizer (DDFS) experimental design, 23 5: Based on Direct Digital Synthesis technology, arbitrary waveform generator
Date : 2025-12-16 Size : 2.57mb User : 耿守浩

内容简介 《基于 MATLAB 7.x的系统分析与设计(第2版)——控制系统》 MATLAB的推出得到了各个领域专家学者的广泛关注,其强大的扩展功能为用户提供了强有力的支持。 本书针对应用广泛的控制系统领域,简要介绍了控制系统理论的基本概念和基本方法,详细介绍了由MATLAB提供的控制系统工具箱函数的用法指南,最后以大量的应用示例, 说明了基于MATLAB进行控制系统分析与设计的方法。 本书可作为“自动控制原理”、“控制系统分析与设计”等课程的参考书,对课程学习可起到事半功倍的效果。本书对控制系统领域的教师、研究生、高年级本科生和广大科研人员都有重要的参考价值,对其它领域的科研人员也有一定的借鉴作用。-Introduction "Based on MATLAB 7. x, System Analysis and Design (2nd edition)- Control System " The introduction of MATLAB experts and scholars in various fields has been widespread concern in the expansion of its powerful capabilities to provide users with a powerful Support. This book is widely used control system for the field, briefly introduced the basic concepts of control system theory and basic methods are used, refer Presentations provided by the MATLAB Control System Toolbox functions usage guide, and finally to a large number of application examples to illustrate based on the MATLAB for control system analysis and design methods. This book can be used as "control theory", "Control System Analysis and Design" and other courses of reference books, can play on courses Multiplier effect. Book on control systems in the field of teachers, graduate students, undergraduates and general researchers have re- To the reference value, researchers in other fields also hav
Date : 2025-12-16 Size : 12.85mb User : 李可

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以ARM9E-S为例介绍ARM9处理器的主要结构及其特点。ARM9E-S的结构如图4所示。其主要特点如下: (1)32bit定点RISC处理器,改进型ARM/Thumb代码交织,增强性乘法器-ARM9E-S, for example the main structure and its characteristics on ARM9 processor. ARM9E-S structure is shown in Figure 4. Its main features are as follows: (1) 32bit the sentinel RISC processor, improved ARM/Thumb code intertwined enhance sexual multiplier ...
Date : 2025-12-16 Size : 4.7mb User : zhaoxinyue

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基于跳跃式 Wallace 树的低功耗 32 位乘法器。可以参考。 -Based on low-power 32-bit leapfrog Wallace tree multiplier. Can refer to.
Date : 2025-12-16 Size : 104kb User : 海到无涯

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该资料用于学习matlab界面编程,对于初学者可以达到事半功倍的效果,能快速入门-The information is used to learn the matlab interface programming for beginners can achieve a multiplier effect, to Quick Start
Date : 2025-12-16 Size : 708kb User : 李强

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16位乘法器的设计指导,包还一些基础的介绍及设计理念-16-bit multiplier design guidance package also some basic introduction and design concept
Date : 2025-12-16 Size : 12.25mb User : 萧搏

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4位乘法器的vhdl语言实现4位乘法的功能,得到使用的功能。-4-bit multiplier vhdl language the four multiplication function, use the function.
Date : 2025-12-16 Size : 1kb User : wcy

CMOS模拟乘法器电路设计- 钱斌-CMOS analog multiplier circuit design- Qian BinCMOS analog multiplier circuit design- Qian Bin
Date : 2025-12-16 Size : 1.2mb User : 代辛恩

包含所有约束优化问题中涉及的matlab源程序。包含Rosen梯度法求解约束多维函数的极值,外点罚函数法解线性等式约束,外点罚函数法解一般等式约束,内点罚函数法,混合罚函数法,混合罚函数加速法,乘子法,坐标轮换法及复合形法-Contains all the constrained optimization problem involves matlab source. Contains Rosen gradient method for solving constrained multi-dimensional function extremum, external point penalty function method for solving linear equality constraints, external point penalty function method for solving general equality constraints, interior point penalty function method, mixed penalty function method, mixed penalty function acceleration method , multiplier method, the coordinate rotation method and complex method
Date : 2025-12-16 Size : 7kb User : 陈陈

针对概率假设密度 (Probability hypothesis density, PHD) 高斯混合实现算法中的分量删减问题, 提出了基于 Dirichlet 分布的分量删减算法以改进概率假设密度高斯混合实现算法的性能. 算法采用极大后验准则估计混合参数, 采用仅 依赖于混合权重的负指数 Dirichlet 分布作为混合参数的先验分布, 利用拉格朗日乘子推导了混合权重的更新公式. 算法利用 负指数 Dirichlet 分布的不稳定性, 在极大后验迭代过程中驱使与目标强度不相关的分量消亡. 该不稳定性还能够解决多个相 近分量共同描述一个强度峰值的问题-As far as component pruning in Gaussian mixture (GM) implementation of probability hypothesis density (PHD) is concerned, a component pruning algorithm based on Dirichlet distribution is proposed to improve the performance of Gaussian mixture implementation of probability hypothesis density. The maximum a posterior criterion is adopted for estimation of mixing parameters. Dirichlet distribution with negative exponent parameters, which only depends on mixing weights, is adopted as the prior distribution of mixing parameters. The update formulation of mixing weight is derived by Lagrange multiplier. The instability of Dirichlet distribution with negative exponent parameters is applied to driving the components irrelevant with target intensity to extinction during the maximum a posterior iteration. Besides, the problem that one peak of intensity is presented by several proximate mixing component
Date : 2025-12-16 Size : 1.23mb User : 正东
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