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[Windows CE] DDSFPGA_cylone DL : 0: dds设计，花了一个星期做的,verilog写的，可生成多种波形，频率范围可上M,性能不错。-dds design, spent a week doing, verilog written, multiple waveform generation, frequency range available on the M, good performance.
Date : 2025-12-29 Size : 623kb User : 苏纳