Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: sin Download
 Description: The output of the sine wave can be realized and the phase and frequency of the sine wave can be controlled by two control words.
 Downloaders recently: [More information of uploader 李俊 ]
 To Search:
File list (Check if you may need any files): 
DDS.v
DDS.v.bak
DDS.jdi
DDS.qpf
DDS.qsf
DDS.qws

CodeBus www.codebus.net