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Title: Altera-verilog-DS1302_ok Download
 Description: Altera flatform, dirve ds1302 device, test ok.
 Downloaders recently: [More information of uploader 张武 ]
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File list (Check if you may need any files):
Altera-verilog-DS1302_ok\db\DS1302.amm.cdb
Altera-verilog-DS1302_ok\db\DS1302.asm.qmsg
Altera-verilog-DS1302_ok\db\DS1302.asm.rdb
Altera-verilog-DS1302_ok\db\DS1302.cbx.xml
Altera-verilog-DS1302_ok\db\DS1302.cmp.bpm
Altera-verilog-DS1302_ok\db\DS1302.cmp.cdb
Altera-verilog-DS1302_ok\db\DS1302.cmp.hdb
Altera-verilog-DS1302_ok\db\DS1302.cmp.kpt
Altera-verilog-DS1302_ok\db\DS1302.cmp.logdb
Altera-verilog-DS1302_ok\db\DS1302.cmp.rdb
Altera-verilog-DS1302_ok\db\DS1302.cmp0.ddb
Altera-verilog-DS1302_ok\db\DS1302.cmp_merge.kpt
Altera-verilog-DS1302_ok\db\DS1302.db_info
Altera-verilog-DS1302_ok\db\DS1302.fit.qmsg
Altera-verilog-DS1302_ok\db\DS1302.hier_info
Altera-verilog-DS1302_ok\db\DS1302.hif
Altera-verilog-DS1302_ok\db\DS1302.idb.cdb
Altera-verilog-DS1302_ok\db\DS1302.lpc.html
Altera-verilog-DS1302_ok\db\DS1302.lpc.rdb
Altera-verilog-DS1302_ok\db\DS1302.lpc.txt
Altera-verilog-DS1302_ok\db\DS1302.map.bpm
Altera-verilog-DS1302_ok\db\DS1302.map.cdb
Altera-verilog-DS1302_ok\db\DS1302.map.hdb
Altera-verilog-DS1302_ok\db\DS1302.map.kpt
Altera-verilog-DS1302_ok\db\DS1302.map.logdb
Altera-verilog-DS1302_ok\db\DS1302.map.qmsg
Altera-verilog-DS1302_ok\db\DS1302.map.rdb
Altera-verilog-DS1302_ok\db\DS1302.map_bb.cdb
Altera-verilog-DS1302_ok\db\DS1302.map_bb.hdb
Altera-verilog-DS1302_ok\db\DS1302.map_bb.logdb
Altera-verilog-DS1302_ok\db\DS1302.pre_map.cdb
Altera-verilog-DS1302_ok\db\DS1302.pre_map.hdb
Altera-verilog-DS1302_ok\db\DS1302.root_partition.map.reg_db.cdb
Altera-verilog-DS1302_ok\db\DS1302.routing.rdb
Altera-verilog-DS1302_ok\db\DS1302.rtlv.hdb
Altera-verilog-DS1302_ok\db\DS1302.rtlv_sg.cdb
Altera-verilog-DS1302_ok\db\DS1302.rtlv_sg_swap.cdb
Altera-verilog-DS1302_ok\db\DS1302.sgdiff.cdb
Altera-verilog-DS1302_ok\db\DS1302.sgdiff.hdb
Altera-verilog-DS1302_ok\db\DS1302.sld_design_entry.sci
Altera-verilog-DS1302_ok\db\DS1302.sld_design_entry_dsc.sci
Altera-verilog-DS1302_ok\db\DS1302.smart_action.txt
Altera-verilog-DS1302_ok\db\DS1302.smp_dump.txt
Altera-verilog-DS1302_ok\db\DS1302.sta.qmsg
Altera-verilog-DS1302_ok\db\DS1302.sta.rdb
Altera-verilog-DS1302_ok\db\DS1302.sta_cmp.8_slow.tdb
Altera-verilog-DS1302_ok\db\DS1302.syn_hier_info
Altera-verilog-DS1302_ok\db\DS1302.tis_db_list.ddb
Altera-verilog-DS1302_ok\db\DS1302.tmw_info
Altera-verilog-DS1302_ok\db\logic_util_heursitic.dat
Altera-verilog-DS1302_ok\db\prev_cmp_DS1302.qmsg
Altera-verilog-DS1302_ok\DS1302.asm.rpt
Altera-verilog-DS1302_ok\DS1302.cdf
Altera-verilog-DS1302_ok\DS1302.done
Altera-verilog-DS1302_ok\DS1302.fit.rpt
Altera-verilog-DS1302_ok\DS1302.fit.smsg
Altera-verilog-DS1302_ok\DS1302.fit.summary
Altera-verilog-DS1302_ok\DS1302.flow.rpt
Altera-verilog-DS1302_ok\DS1302.jdi
Altera-verilog-DS1302_ok\DS1302.map.rpt
Altera-verilog-DS1302_ok\DS1302.map.smsg
Altera-verilog-DS1302_ok\DS1302.map.summary
Altera-verilog-DS1302_ok\DS1302.pin
Altera-verilog-DS1302_ok\DS1302.pof
Altera-verilog-DS1302_ok\DS1302.qpf
Altera-verilog-DS1302_ok\DS1302.qsf
Altera-verilog-DS1302_ok\DS1302.qws
Altera-verilog-DS1302_ok\DS1302.sof
Altera-verilog-DS1302_ok\DS1302.sta.rpt
Altera-verilog-DS1302_ok\DS1302.sta.summary
Altera-verilog-DS1302_ok\DS1302.tan.rpt
Altera-verilog-DS1302_ok\DS1302.tan.summary
Altera-verilog-DS1302_ok\DS1302.v
Altera-verilog-DS1302_ok\DS1302.v.bak
Altera-verilog-DS1302_ok\DS1302.vhd.bak
Altera-verilog-DS1302_ok\DS1302_assignment_defaults.qdf
Altera-verilog-DS1302_ok\DS1302_RW.v
Altera-verilog-DS1302_ok\DS1302_RW.v.bak
Altera-verilog-DS1302_ok\DS1302_RW.vhd.bak
Altera-verilog-DS1302_ok\gen_divd.v
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.db_info
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.cmp.cdb
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.cmp.dfp
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.cmp.hdb
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.cmp.kpt
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.cmp.logdb
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.cmp.rcfdb
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.map.cdb
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.map.dpi
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.map.hbdb.cdb
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.map.hbdb.hb_info
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.map.hbdb.hdb
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.map.hbdb.sig
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.map.hdb
Altera-verilog-DS1302_ok\incremental_db\compiled_partitions\DS1302.root_partition.map.kpt
Altera-verilog-DS1302_ok\incremental_db\README
Altera-verilog-DS1302_ok\Tcl.tcl
Altera-verilog-DS1302_ok\Tcl.tcl.bak
Altera-verilog-DS1302_ok\uart_x.v
Altera-verilog-DS1302_ok\uart_x.v.bak

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