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Title: DES_Triple-DES-IP-Cores Download
 Description: Triple DES core implementation in verilog. It takes three standard 56 bit keys and 64 bits of data as input and generates a 64 bit encrypted/decrypted result.
 Downloaders recently: [More information of uploader 金铁男]
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DES_Triple DES IP Cores
.......................\BENCH
.......................\.....\VERILOG
.......................\.....\.......\des3_test_ao.v
.......................\.....\.......\des3_test_po.v
.......................\.....\.......\des_test_ao.v
.......................\.....\.......\des_test_po.v
.......................\DOC
.......................\...\README.TXT
.......................\RTL
.......................\...\VERILOG
.......................\...\.......\AREA_OPT
.......................\...\.......\........\DES.V
.......................\...\.......\........\DES3.V
.......................\...\.......\........\KEY_SEL.V
.......................\...\.......\........\KEY_SEL3.V
.......................\...\.......\COMMON
.......................\...\.......\......\CRP.V
.......................\...\.......\......\SBOX1.V
.......................\...\.......\......\SBOX2.V
.......................\...\.......\......\SBOX3.V
.......................\...\.......\......\SBOX4.V
.......................\...\.......\......\SBOX5.V
.......................\...\.......\......\SBOX6.V
.......................\...\.......\......\SBOX7.V
.......................\...\.......\......\SBOX8.V
.......................\...\.......\PERF_OPT
.......................\...\.......\........\DES.V
.......................\...\.......\........\DES3.V
.......................\...\.......\........\KEY_SEL.V
.......................\SIM
.......................\...\RTL_SIM
.......................\...\.......\BIN
.......................\...\.......\...\Makefile
.......................\SYN
.......................\...\BIN
.......................\...\...\COMP_AO.DC
.......................\...\...\COMP_AO3.DC
.......................\...\...\COMP_PO.DC
.......................\...\...\COMP_PO3.DC
.......................\...\...\design_spec_ao.dc
.......................\...\...\design_spec_ao3.dc
.......................\...\...\design_spec_po.dc
.......................\...\...\design_spec_po3.dc
.......................\...\...\LIB_SPEC.DC
.......................\...\...\READ_AO.DC
.......................\...\...\READ_AO3.DC
.......................\...\...\READ_PO.DC
.......................\...\...\READ_PO3.DC
    

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