DE4_530_D5M_DVI\.sopc_builder\filters.xml
...............\.............\install.ptf
...............\.............\install2.ptf
...............\.............\preferences.xml
...............\altera_avalon_half_rate_bridge.v
...............\altera_avalon_half_rate_bridge_constraints.sdc
...............\...memphy-library\auk_ddr_hp_controller.ocp
...............\alt_ddrx_addr_cmd.v
...............\alt_ddrx_afi_block.v
...............\alt_ddrx_avalon_if.v
...............\alt_ddrx_bank_tracking.v
...............\alt_ddrx_clock_and_reset.v
...............\alt_ddrx_cmd_queue.v
...............\alt_ddrx_controller.v
...............\alt_ddrx_csr.v
...............\alt_ddrx_ddr2_odt_gen.v
...............\alt_ddrx_ddr3_odt_gen.v
...............\alt_ddrx_decoder.v
...............\alt_ddrx_decoder_40.v
...............\alt_ddrx_decoder_72.v
...............\alt_ddrx_ecc.v
...............\alt_ddrx_encoder.v
...............\alt_ddrx_encoder_40.v
...............\alt_ddrx_encoder_72.v
...............\alt_ddrx_input_if.v
...............\alt_ddrx_odt_gen.v
...............\alt_ddrx_state_machine.v
...............\alt_ddrx_timers.v
...............\alt_ddrx_timers_fsm.v
...............\alt_ddrx_wdata_fifo.v
...............\alt_mem_phy_defines.v
...............\CCD_Capture.v
...............\ddr2.html
...............\ddr2.qip
...............\ddr2.v
...............\ddr2_advisor.ipa
...............\ddr2_alt_ddrx_controller_wrapper.v
...............\ddr2_controller_phy.v
...............\ddr2_example_driver.v
...............\ddr2_example_top.sdc
...............\ddr2_example_top.v
...............\ddr2_ex_lfsr8.v
...............\.....high_performance_controller-library\auk_ddr_hp_controller.ocp
...............\ddr2_multi_port.bsf
...............\ddr2_multi_port.html
...............\ddr2_multi_port.ptf
...............\ddr2_multi_port.ptf.8.0
...............\ddr2_multi_port.ptf.pre_generation_ptf
...............\ddr2_multi_port.qip
...............\ddr2_multi_port.sopc
...............\ddr2_multi_port.sopcinfo
...............\ddr2_multi_port.v
...............\ddr2_multi_port_burst_0.v
...............\ddr2_multi_port_burst_1.v
...............\ddr2_multi_port_generation_script
...............\ddr2_multi_port_inst.v
...............\ddr2_multi_port_log.txt
...............\ddr2_phy.html
...............\ddr2_phy.qip
...............\ddr2_phy.v
...............\ddr2_phy_alt_mem_phy.v
...............\ddr2_phy_alt_mem_phy_pll.bsf
...............\ddr2_phy_alt_mem_phy_pll.qip
...............\ddr2_phy_alt_mem_phy_pll.v
...............\ddr2_phy_alt_mem_phy_seq.vhd
...............\ddr2_phy_alt_mem_phy_seq_wrapper.v
...............\ddr2_phy_ddr_pins.tcl
...............\ddr2_phy_ddr_timing.sdc
...............\ddr2_phy_ddr_timing.tcl
...............\ddr2_phy_report_timing.tcl
...............\ddr2_phy_report_timing_core.tcl
...............\ddr2_pin_assignments.tcl
...............\DDR2_SODIMM_Read_Port.v
...............\DDR2_SODIMM_Read_Port_hw.tcl
...............\DDR2_SODIMM_Write_Port.v
...............\DDR2_SODIMM_Write_Port_hw.tcl
...............\DE4_530_D5M_DVI.htm
...............\DE4_530_D5M_DVI.pin
...............\DE4_530_D5M_DVI.qpf
...............\DE4_530_D5M_DVI.qsf
...............\DE4_530_D5M_DVI.sdc
...............\DE4_530_D5M_DVI.sof
...............\DE4_530_D5M_DVI.v
...............\DE4_530_D5M_DVI_assignment_defaults.qdf
...............\EXT_PLL_CTRL.v
...............\gen_108.mif
...............\gen_148.mif
...............\gen_162.mif
...............\gen_25.mif
...............\gen_27.mif
...............\gen_65.mif
...............\gen_74.mif
...............\gen_pll.mif
...............\gen_pll.v
...............\.reybox_tmp\cbx_args.txt
...............\i2c_ccd_config.v
...............\I2C_Controller.v
...............\Line_Buffer.v
...............\Line_Buffer1.v
...............\pattern_gen.v