sdr_c_trl_verilog SDRAM controller Verilog code co

Title: sdr_c_trl_verilog

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Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
12kb
Update:
2012-11-26
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Uploaded by:
cleanclear1978

Description: SDRAM controller Verilog code comprehensive test after all. No cut-off pressure Password

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To Search: SDRAM sdram verilog verilog sdram verilog verilog SDRAM SDRAM verilog fpga ram

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File list (Check if you may need any files):

verilog
.......\source
.......\......\altclklock.v
.......\......\Command.v
.......\......\compile_all.v
.......\......\control_interface.v
.......\......\Params.v
.......\......\PLL1.v
.......\......\sdr_data_path.v
.......\......\sdr_sdram.v

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