Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: HY57V64_control Download
 Description: This code is used instead of directly in verilog ip core nios used to achieve HY57V641620FTP-6 reading and writing, the timing exactly right, from the serial data output to verify entirely correct. With notes and references. I hope for your help.
 Downloaders recently: [More information of uploader 普尔]
 To Search:
File list (Check if you may need any files):
 

SDRAM_Test 2
............\clk_ctrl.ppf
............\clk_ctrl.qip
............\clk_ctrl.v
............\clk_ctrl_bb.v
............\datagene.v
............\datagene.v.bak
............\db
............\..\altsyncram_2t14.tdf
............\..\altsyncram_3j01.tdf
............\..\altsyncram_6hq1.tdf
............\..\altsyncram_ahq1.tdf
............\..\altsyncram_av14.tdf
............\..\altsyncram_cv14.tdf
............\..\altsyncram_e7e1.tdf
............\..\altsyncram_ev14.tdf
............\..\altsyncram_ijq1.tdf
............\..\altsyncram_is14.tdf
............\..\altsyncram_k324.tdf
............\..\altsyncram_kjq1.tdf
............\..\altsyncram_mjq1.tdf
............\..\altsyncram_ms14.tdf
............\..\altsyncram_qgq1.tdf
............\..\altsyncram_ugq1.tdf
............\..\altsyncram_us14.tdf
............\..\alt_synch_pipe_fv7.tdf
............\..\alt_synch_pipe_gv7.tdf
............\..\a_gray2bin_kdb.tdf
............\..\a_graycounter_c2c.tdf
............\..\a_graycounter_d2c.tdf
............\..\a_graycounter_o96.tdf
............\..\cmpr_536.tdf
............\..\cmpr_5cc.tdf
............\..\cmpr_9cc.tdf
............\..\cmpr_acc.tdf
............\..\cmpr_ccc.tdf
............\..\cntr_0ci.tdf
............\..\cntr_1ci.tdf
............\..\cntr_2ci.tdf
............\..\cntr_edi.tdf
............\..\cntr_fdi.tdf
............\..\cntr_gdi.tdf
............\..\cntr_gui.tdf
............\..\cntr_idi.tdf
............\..\cntr_m4j.tdf
............\..\cntr_qbi.tdf
............\..\cntr_sbi.tdf
............\..\cntr_u4j.tdf
............\..\cntr_v1j.tdf
............\..\dcfifo_aal1.tdf
............\..\decode_1oa.tdf
............\..\decode_rqf.tdf
............\..\dffpipe_909.tdf
............\..\dffpipe_a09.tdf
............\..\dffpipe_c2e.tdf
............\..\logic_util_heursitic.dat
............\..\mux_7oc.tdf
............\..\mux_9oc.tdf
............\..\mux_eoc.tdf
............\..\mux_flb.tdf
............\..\prev_cmp_sdr_test.qmsg
............\..\sdr_test.amm.cdb
............\..\sdr_test.asm.qmsg
............\..\sdr_test.asm.rdb
............\..\sdr_test.asm_labs.ddb
............\..\sdr_test.cbx.xml
............\..\sdr_test.cmp.bpm
............\..\sdr_test.cmp.cdb
............\..\sdr_test.cmp.hdb
............\..\sdr_test.cmp.kpt
............\..\sdr_test.cmp.logdb
............\..\sdr_test.cmp.rdb
............\..\sdr_test.cmp0.ddb
............\..\sdr_test.cmp1.ddb
............\..\sdr_test.cmp2.ddb
............\..\sdr_test.cmp_merge.kpt
............\..\sdr_test.db_info
............\..\sdr_test.eda.qmsg
............\..\sdr_test.fit.qmsg
............\..\sdr_test.hier_info
............\..\sdr_test.hif
............\..\sdr_test.idb.cdb
............\..\sdr_test.lpc.html
............\..\sdr_test.lpc.rdb
............\..\sdr_test.lpc.txt
............\..\sdr_test.map.bpm
............\..\sdr_test.map.cdb
............\..\sdr_test.map.hdb
............\..\sdr_test.map.kpt
............\..\sdr_test.map.logdb
............\..\sdr_test.map.qmsg
............\..\sdr_test.map.rcfdb
............\..\sdr_test.map_bb.cdb
............\..\sdr_test.map_bb.hdb
............\..\sdr_test.map_bb.logdb
............\..\sdr_test.merge.qmsg
............\..\sdr_test.pre_map.cdb
............\..\sdr_test.pre_map.hdb
............\..\sdr_test.rpp.qmsg
............\..\sdr_test.rtlv.hdb
    

CodeBus www.codebus.net