verilog  uart
.............\db
.............\..\my_uart_top.db_info
.............\..\my_uart_top.eco.cdb
.............\..\my_uart_top.sld_design_entry.sci
.............\..\my_uart_top_global_asgn_op.abo
.............\..\prev_cmp_my_uart_top.asm.qmsg
.............\..\prev_cmp_my_uart_top.fit.qmsg
.............\..\prev_cmp_my_uart_top.map.qmsg
.............\..\prev_cmp_my_uart_top.tan.qmsg
.............\incremental_db
.............\..............\compiled_partitions
.............\..............\...................\my_uart_top.root_partition.map.kpt
.............\..............\README
.............\my_uart_rx.v
.............\my_uart_top.asm.rpt
.............\my_uart_top.cdf
.............\my_uart_top.done
.............\my_uart_top.dpf
.............\my_uart_top.fit.rpt
.............\my_uart_top.fit.smsg
.............\my_uart_top.fit.summary
.............\my_uart_top.flow.rpt
.............\my_uart_top.jpg
.............\my_uart_top.map.rpt
.............\my_uart_top.map.smsg
.............\my_uart_top.map.summary
.............\my_uart_top.pin
.............\my_uart_top.pof
.............\my_uart_top.qpf
.............\my_uart_top.qsf
.............\my_uart_top.qws
.............\my_uart_top.tan.rpt
.............\my_uart_top.tan.summary
.............\my_uart_top.v
.............\my_uart_top.v.bak
.............\my_uart_top_assignment_defaults.qdf
.............\my_uart_tx.v
.............\speed_select.v