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Title: SingleLoopSDM_prj Download
 Description: Of the fractional frequency divider in the synthesizer to optimize the configuration, reducing the reference spur.
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File list (Check if you may need any files):
SingleLoopSDM_prj\data\testinteger.ds
.................\....\testSDM.ds
.................\....\__simdata010728.ds
.................\....\__simdata032098.ds
.................\....\__simdata113736.ds
.................\de_sim.cfg
.................\de_sim.cfg.old
.................\hpeesofsim.cfg
.................\hpeesofsim.cfg.old
.................\layout.prf
.................\mil_layout.prf
.................\mil_schematic.prf
.................\momServer.log
.................\netlist.log
.................\...works\SigmaDelta3order.ael
.................\........\SigmaDelta3order.atf
.................\........\SigmaDelta3order.bak
.................\........\SigmaDelta3order.dsn
.................\........\SigmaDelta4order.ael
.................\........\SigmaDelta4order.atf
.................\........\SigmaDelta4order.bak
.................\........\SigmaDelta4order.dsn
.................\........\test3order.ael
.................\........\test3order.atf
.................\........\test3order.bak
.................\........\test3order.dsn
.................\........\test4order.ael
.................\........\test4order.dsn
.................\point.txt
.................\point1.txt
.................\project.ads
.................\save_project_state.ael
.................\save_project_state.bak
.................\schematic.prf
.................\test3order.dds
.................\test4order.dds
.................\veriloga\SigmaDelta3order.va
.................\........\SigmaDelta4order.va
.................\data
.................\mom_dsn
.................\networks
.................\synthesis
.................\verification
.................\veriloga
SingleLoopSDM_prj
    

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