Description: DDS digital frequency synthesis verilog code, with a cosine look-up table, etc.
- [ddssinegeneratorcode.Rar] - described dds direct digital frequency s
- [pinluji] - Four decimal frequency meter measuring f
- [FPGA-TWO-RAM] - This can be achieved in the FPGA dual-po
- [teach10] - FPGA-based digital frequency meter super
- [verilog_FPGA_DDC] - This a verilog HDL used to achieve the r
- [dds] - The DDS-based FPGA design, the procedure
- [DS-Verilog] - ad
- [FSM] - This paper introduces the optimization o
- [rom] - The source code is based on the VHDL cod
- [I2C_Interface(VHDL)] - I2C bus interface FPGA implementation of
File list (Check if you may need any files):
DDDDDDDDDSSS\.sopc_builder\filters.xml
............\altpll0.bsf
............\altpll0.inc
............\altpll0.ppf
............\altpll0.qip
............\altpll0.v
............\altpll0_bb.v
............\boxing.bsf
............\control.bsf
............\counter.bsf
............\db\add_sub_unc.tdf
............\..\add_sub_vnc.tdf
............\..\altpll_do32.tdf
............\..\altpll_hd42.tdf
............\..\altpll_hua2.tdf
............\..\altpll_jua2.tdf
............\..\altsyncram_96a1.tdf
............\..\altsyncram_ep91.tdf
............\..\altsyncram_h2a1.tdf
............\..\altsyncram_i7a1.tdf
............\..\altsyncram_nq91.tdf
............\..\altsyncram_q3a1.tdf
............\..\alt_u_div_16f.tdf
............\..\alt_u_div_36f.tdf
............\..\alt_u_div_39f.tdf
............\..\alt_u_div_59f.tdf
............\..\alt_u_div_69f.tdf
............\..\alt_u_div_f9f.tdf
............\..\alt_u_div_l8f.tdf
............\..\alt_u_div_n8f.tdf
............\..\alt_u_div_o8f.tdf
............\..\alt_u_div_p2f.tdf
............\..\alt_u_div_p8f.tdf
............\..\alt_u_div_r5f.tdf
............\..\alt_u_div_t5f.tdf
............\..\alt_u_div_t8f.tdf
............\..\alt_u_div_v8f.tdf
............\..\logic_util_heursitic.dat
............\..\lpm_divide_4jm.tdf
............\..\lpm_divide_5jm.tdf
............\..\lpm_divide_6gm.tdf
............\..\lpm_divide_6jm.tdf
............\..\lpm_divide_7jm.tdf
............\..\lpm_divide_8jm.tdf
............\..\lpm_divide_98m.tdf
............\..\lpm_divide_9jm.tdf
............\..\lpm_divide_bjm.tdf
............\..\lpm_divide_cjm.tdf
............\..\lpm_divide_djm.tdf
............\..\lpm_divide_hjm.tdf
............\..\lpm_divide_nhm.tdf
............\..\lpm_divide_ohm.tdf
............\..\lpm_divide_q9m.tdf
............\..\lpm_divide_qhm.tdf
............\..\lpm_divide_r9m.tdf
............\..\lpm_divide_rhm.tdf
............\..\mult_4et.tdf
............\..\mult_5et.tdf
............\..\mult_7et.tdf
............\..\mult_hft.tdf
............\..\mult_mft.tdf
............\..\mux_7qc.tdf
............\..\mux_cqc.tdf
............\..\mux_src.tdf
............\..\My_DDS.asm.qmsg
............\..\My_DDS.asm.rdb
............\..\My_DDS.asm_labs.ddb
............\..\My_DDS.cbx.xml
............\..\My_DDS.cmp.bpm
............\..\My_DDS.cmp.cbp
............\..\My_DDS.cmp.cdb
............\..\My_DDS.cmp.ecobp
............\..\My_DDS.cmp.hdb
............\..\My_DDS.cmp.kpt
............\..\My_DDS.cmp.logdb
............\..\My_DDS.cmp.rdb
............\..\My_DDS.cmp_merge.kpt
............\..\My_DDS.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
............\..\My_DDS.cuda_io_sim_cache.31um_tt_1200mv_85c_slow.hsd
............\..\My_DDS.db_info
............\..\My_DDS.eco.cdb
............\..\My_DDS.eds_overflow
............\..\My_DDS.fit.qmsg
............\..\My_DDS.fnsim.hdb
............\..\My_DDS.fnsim.qmsg
............\..\My_DDS.hier_info
............\..\My_DDS.hif
............\..\My_DDS.lpc.html
............\..\My_DDS.lpc.rdb
............\..\My_DDS.lpc.txt
............\..\My_DDS.map.bpm
............\..\My_DDS.map.cbp
............\..\My_DDS.map.cdb
............\..\My_DDS.map.ecobp
............\..\My_DDS.map.hdb
............\..\My_DDS.map.kpt
............\..\My_DDS.map.logdb
............\..\My_DDS.map.qmsg
............\..\My_DDS.map_bb.cdb
............\..\My_DDS.map_bb.hdb
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