Description: SDRAM control procedures can be used as an IP core, more than the built-in capabilities can be stabilized to run
- [ep1c3] - There are basic FPGA development board f
- [I2C_interface] - i2c interface with master-slave control
File list (Check if you may need any files):
SDRAMTEST
.........\.sopc_builder
.........\.............\install.ptf
.........\cpu_0.ocp
.........\cpu_0.v
.........\cpu_0.vo
.........\cpu_0_jtag_debug_module.v
.........\cpu_0_jtag_debug_module_wrapper.v
.........\cpu_0_ociram_default_contents.mif
.........\cpu_0_rf_ram.mif
.........\cpu_0_test_bench.v
.........\db
.........\..\altsyncram_1l22.tdf
.........\..\altsyncram_c572.tdf
.........\..\altsyncram_e502.tdf
.........\..\altsyncram_kvb1.tdf
.........\..\decode_3oa.tdf
.........\..\decode_aoi.tdf
.........\..\mux_0kb.tdf
.........\..\SDRAMTest.asm.qmsg
.........\..\SDRAMTest.asm_labs.ddb
.........\..\SDRAMTest.cbx.xml
.........\..\SDRAMTest.cmp.bpm
.........\..\SDRAMTest.cmp.cdb
.........\..\SDRAMTest.cmp.ecobp
.........\..\SDRAMTest.cmp.hdb
.........\..\SDRAMTest.cmp.logdb
.........\..\SDRAMTest.cmp.rdb
.........\..\SDRAMTest.cmp.tdb
.........\..\SDRAMTest.cmp0.ddb
.........\..\SDRAMTest.cmp_bb.cdb
.........\..\SDRAMTest.cmp_bb.hdb
.........\..\SDRAMTest.cmp_bb.logdb
.........\..\SDRAMTest.cmp_bb.rcf
.........\..\SDRAMTest.dbp
.........\..\SDRAMTest.db_info
.........\..\SDRAMTest.eco.cdb
.........\..\SDRAMTest.fit.qmsg
.........\..\SDRAMTest.hier_info
.........\..\SDRAMTest.hif
.........\..\SDRAMTest.map.bpm
.........\..\SDRAMTest.map.cdb
.........\..\SDRAMTest.map.ecobp
.........\..\SDRAMTest.map.hdb
.........\..\SDRAMTest.map.logdb
.........\..\SDRAMTest.map.qmsg
.........\..\SDRAMTest.map_bb.cdb
.........\..\SDRAMTest.map_bb.hdb
.........\..\SDRAMTest.map_bb.logdb
.........\..\SDRAMTest.merge.qmsg
.........\..\SDRAMTest.pre_map.cdb
.........\..\SDRAMTest.pre_map.hdb
.........\..\SDRAMTest.psp
.........\..\SDRAMTest.pss
.........\..\SDRAMTest.rtlv.hdb
.........\..\SDRAMTest.rtlv_sg.cdb
.........\..\SDRAMTest.rtlv_sg_swap.cdb
.........\..\SDRAMTest.sgdiff.cdb
.........\..\SDRAMTest.sgdiff.hdb
.........\..\SDRAMTest.signalprobe.cdb
.........\..\SDRAMTest.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
.........\..\SDRAMTest.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
.........\..\SDRAMTest.sld_design_entry.sci
.........\..\SDRAMTest.sld_design_entry_dsc.sci
.........\..\SDRAMTest.smp_dump.txt
.........\..\SDRAMTest.syn_hier_info
.........\..\SDRAMTest.tan.qmsg
.........\LED.v
.........\onchip_memory_0.hex
.........\onchip_memory_0.v
.........\SDRAM.v
.........\SDRAMTest.asm.rpt
.........\SDRAMTest.bdf
.........\SDRAMTest.cdf
.........\SDRAMTest.done
.........\SDRAMTest.dpf
.........\SDRAMTest.fit.rpt
.........\SDRAMTest.fit.smsg
.........\SDRAMTest.fit.summary
.........\SDRAMTest.flow.rpt
.........\SDRAMTest.jdi
.........\SDRAMTest.map.rpt
.........\SDRAMTest.map.summary
.........\SDRAMTest.merge.rpt
.........\SDRAMTest.pin
.........\SDRAMTest.pof
.........\SDRAMTest.qpf
.........\SDRAMTest.qsf
.........\SDRAMTest.qsf.bak
.........\SDRAMTest.qws
.........\SDRAMTest.sof
.........\SDRAMTest.tan.rpt
.........\SDRAMTest.tan.summary
.........\SDRAM_CLK.bsf
.........\SDRAM_CLK.ppf
.........\SDRAM_CLK.v
.........\SDRAM_CLK_bb.v
.........\SDRAM_CLK_wave0.jpg
.........\SDRAM_CLK_waveforms.html
.........\SDRAM_PLL.bsf
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