SDRAM Modelsim\实战训练13 SDRAM读写控制的实现与Modelsim仿真\说明.txt
..............\............................................\part2\rtl\burst_wr.v
..............\............................................\.....\...\page_wr.v
..............\............................................\.....\...\test.ucf
..............\............................................\.....\...\testtry.v
..............\............................................\.....\project\automake.log
..............\............................................\.....\.......\bitgen.ut
..............\............................................\.....\.......\Project.dhp
..............\............................................\.....\.......\project.ise
..............\............................................\.....\.......\project.ise_ISE_Backup
..............\............................................\.....\.......\test.bgn
..............\............................................\.....\.......\test.bit
..............\............................................\.....\.......\test.bld
..............\............................................\.....\.......\test.cmd_log
..............\............................................\.....\.......\test.drc
..............\............................................\.....\.......\test.lfp
..............\............................................\.....\.......\test.lso
..............\............................................\.....\.......\test.mrp
..............\............................................\.....\.......\test.nc1
..............\............................................\.....\.......\test.ncd
..............\............................................\.....\.......\test.ngc
..............\............................................\.....\.......\test.ngd
..............\............................................\.....\.......\test.ngm
..............\............................................\.....\.......\test.ngr
..............\............................................\.....\.......\test.pad
..............\............................................\.....\.......\test.pad_txt
..............\............................................\.....\.......\test.par
..............\............................................\.....\.......\test.pcf
..............\............................................\.....\.......\test.placed_ncd_tracker
..............\............................................\.....\.......\test.prj
..............\............................................\.....\.......\test.routed_ncd_tracker
..............\............................................\.....\.......\test.spl
..............\............................................\.....\.......\test.stx
..............\............................................\.....\.......\test.sym
..............\............................................\.....\.......\test.syr
..............\............................................\.....\.......\test.twr
..............\............................................\.....\.......\test.twx
..............\............................................\.....\.......\test.ucf
..............\............................................\.....\.......\test.ucf.untf
..............\............................................\.....\.......\test.ut
..............\............................................\.....\.......\test.xpi
..............\............................................\.....\.......\testtry.v
..............\............................................\.....\.......\test_bkp.ngd
..............\............................................\.....\.......\test_last_par.ncd
..............\............................................\.....\.......\test_map.ncd
..............\............................................\.....\.......\test_map.ngm
..............\............................................\.....\.......\test_pad.csv
..............\............................................\.....\.......\test_pad.txt
..............\..........................