Description: cache design, direct mapped, write-back cache. 256 lines of four characters. ram memory by the word, the word size is 64K.
- [cache] - cache verilog
- [cache] - this is a code of a cache
File list (Check if you may need any files):
新建文件夹 (2)\cache.v
..............\CacheModule.htm
..............\..........._files\commentboxplus.css
..............\.................\ga.js
..............\.................\monitor-background-horizontal.png
..............\.................\monitor-background-vertical.png
..............\.................\monitor-play-button.png
..............\.................\plain1.css
..............\.................\plain2.css
..............\final_memory.v
..............\four_bank_mem.v
..............\memc.v
..............\memv.v
..............\CacheModule_files
新建文件夹 (2)
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