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Title: rs232 Download
 Description: FPGA Digital Filter Algorithm for information, they can design LMS algorithm
 Downloaders recently: [More information of uploader xhjiao8]
 To Search: lms
  • [20090903FPGA] - In this paper, designed and implemented
  • [LMS_filter] - LMS filter using verilog HDL language
  • [LMS] - Booth algorithm LMS algorithm LMS operat
  • [ERROR_COUNTING_BLOCK] - vhdl code for error counting blk in lms
  • [FPGA] - my english is poor please see Chinese
File list (Check if you may need any files):
rs232\my_uart_tx.v
.....\speed_select.v
.....\my_uart_rx.v
.....\rs232.qpf
.....\rs232.qsf
.....\rs232.done
.....\my_uart_top.bsf
.....\rs232.bdf
.....\rs232.map.eqn
.....\rs232.map.rpt
.....\rs232.flow.rpt
.....\rs232.map.summary
.....\rs232.fit.eqn
.....\rs232.pin
.....\rs232.fit.rpt
.....\rs232.fit.summary
.....\rs232.sof
.....\rs232.pof
.....\rs232.asm.rpt
.....\rs232.tan.summary
.....\rs232.tan.rpt
.....\rs232.ppl
.....\div16.bsf
.....\lcd.bsf
.....\rs232.cdf
.....\cmp_state.ini
.....\lcd.v
.....\DIV16.v
.....\my_uart_top.v
.....\db\rs232.db_info
.....\..\rs232.sld_design_entry.sci
.....\..\rs232.eco.cdb
.....\rs232_assignment_defaults.qdf
.....\rs232.dpf
.....\rs232.qws
.....\db
rs232
    

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