Description: VHDL language with the realization of an 8-bit data, and the string conversion, can be downloaded in the FPGA in
To Search:
- [p2s16_1] - Some time ago to see someone in the onli
- [bc_6] - To implement the six-bit data width and
- [Virtex5] - Virtex5 rarely have the information, I f
- [1253] - Based on the VHDL language and string co
- [parell_to_serial] - The module main is completed and the str
- [par2ser] - And/or parallel series converter input,
- [rs232] - Serial 232 program, to achieve and strin
- [serial_input_parallel_output_module] - serial input parallel output
- [ser_par] - 24bitAD data sampling and converted to s
- [Http] - A rfc of HTTP.
File list (Check if you may need any files):
p_s_conver.bsf
p_s_conver.hif
p_s_conver.vhd
p_s_conver.acf
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