sdram_ver_134 This code is a SDRAM Controller IP C

Title: sdram_ver_134

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
106kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
jdc0522

Description: This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is based Xilinx FPGA Playform.

Downloaders recently: [More information of uploader jdc0522]

To Search: sdram controller FPGA SDRAM sdram ip xilinx sdram sdram fpga xilinx ip core VHDL Memory Controller ip core

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File list (Check if you may need any files):

sdram_ver_134\brst_cntr.v
.............\cslt_cntr.v
.............\define.v
.............\ki_cntr.v
.............\rcd_cntr.v
.............\ref_cntr.v
.............\sdrmc_state.v
.............\sdrm_t.v
.............\sdrm.v
.............\string_decode_fn.v
.............\string_decode_post_route.v
.............\sys_int.v
.............\sdrm.ucf
.............\sdram_ver_134.ise
.............\readme
.............\tb_post_route.tf
.............\tb_sdrm.tf
.............\micron\mt48lc1m16a1-8a.v
.............\......\mt48lc1m16a1.v
.............\......\test.v
.............\......\bank0.txt
.............\......\bank1.txt

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