Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: parallel-fifo Download
 Description: the model of parallel data transmit which is written of verilog.
 Downloaders recently: [More information of uploader saulxu717]
 To Search:
File list (Check if you may need any files): 
serial-parrellel.v
serial.v

CodeBus www.codebus.net