Description: The board is opened with FRAMERS (E1), even though this example
* does not have PSTN Users, only IP Users.
* * The board is opened and controlled via the PCI interface.
* * Channels 0, 1 are opened (Trunk 0, BChannels 1, 2) and
* activated through RTP. RTP packets are sent by the second
* channel and received by the first channel (using the internal
* IP-loopback option, or using a loopback connector on the IPM-260
* board s NI connector).
- [xsi] - verilog achieve frame synchronization, a
- [epld_mux] - This the realization of the four E1 inte
- [G0704E] - ITU specification G.704. E1 frame struct
- [8b_10b] - VHDL prepared, 8b-10b codec design Encod
- [JRTPUnicast] - JRTP can be used for multicast can also
- [shift] - E1 to receive some of the major function
- [E1_to_e3_v.2.1] - E1 to E3 multiplexing & demultiplexing V
- [E1] - Analysis of frame synchronization algori
File list (Check if you may need any files):
Ex05_07.cpp
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