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Title: DDS Download
 Description: DDS achieved Quartus using IP core provided by altera
  • [ddssinegeneratorcode.Rar] - described dds direct digital frequency s
  • [frame_sync] - frame synchronization module Veriolog so
  • [16QAM] - Use matlab, realize 16QAM modulation and
  • [BFSK_VHDL_CODING] - The use of DDS technology, applications
  • [Crack_QII8.0] - quartus 8 Zhuceji memory has been tested
  • [MD5] - PB using MD5 encryption, can effectively
  • [AT] - AT the Chinese data, suitable for beginn
  • [DDS] - Quartus on the DDS, can occur sine wave,
  • [fpga-pwm] - FPGA with the verilog language written s
File list (Check if you may need any files):
DDS
...\db
...\..\DDS.db_info
...\..\DDS.eco.cdb
...\..\DDS.sld_design_entry.sci
...\DDS.bdf
...\DDS.qpf
...\DDS.qsf
...\DDS.qws
...\FIR.bsf
...\FIR.html
...\FIR.qip
...\FIR.v
...\FIR.vec
...\FIR_ast.vhd
...\FIR_bb.v
...\FIR_coef_int.txt
...\FIR_constraints.tcl
...\FIR_input.txt
...\FIR_mlab.m
...\FIR_model.m
...\FIR_msim.tcl
...\FIR_nativelink.tcl
...\FIR_param.txt
...\FIR_silent_param.txt
...\FIR_st.v
...\LPM_ADD.bsf
...\LPM_ADD.qip
...\LPM_ADD.v
...\LPM_ADD_bb.v

...\LPM_ADD_waveforms.html
...\NCO.bsf
...\NCO.html
...\NCO.qip
...\NCO.v
...\NCO.vec
...\NCO_bb.v
...\NCO_cos.hex
...\NCO_model.m
...\NCO_nativelink.tcl
...\NCO_sin.hex
...\NCO_st.inc
...\NCO_st.v
...\NCO_tb.m
...\NCO_tb.v
...\NCO_tb.vhd
...\NCO_vho_msim.tcl
...\NCO_vo_msim.tcl
...\NCO_wave.do
...\tb_FIR.vhd
...\velocity.log
    

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