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VHDL-FPGA-Verilog
Title:
checkNodee_Behavioral_VHDL
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Category:
VHDL-FPGA-Verilog
Tags:
[Text]
File Size:
1kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
wfpeng
Description:
LDPC check nodes (checknode) carried out at the time of parity equation VHDL programming, hardware language
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File list
(Check if you may need any files):
checkNodee_Behavioral_VHDL ..........................\checkNode_Behavioral.txt
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