USB_jtag Verilog prepared using USB download cable - CodeBus

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Title: USB_jtag

Category:
VHDL-FPGA-Verilog
Tags:
[Text]
File Size:
1.5mb
Update:
2008-10-13
Downloads:
1 Times
Uploaded by:
firehuo01

Description: Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine.

Downloaders recently: [More information of uploader firehuo01]

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