svc_timer33ms Pulse generator under the Verilog so

Title: svc_timer33ms

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
746kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
huangyb

Description: Pulse generator under the Verilog source code, can be used to simulate three-phase alternating current zero-crossing point, mainly for debugging similar SVC (reactive power compensation) controller of a number of algorithms

Downloaders recently: [More information of uploader huangyb]

To Search: Verilog Generator VHDL code for Pulse Generator

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File list (Check if you may need any files):

svc_timer33ms
.............\db
.............\..\add_sub_6sh.tdf
.............\..\add_sub_ash.tdf
.............\..\svc_timer.eco.cdb
.............\..\svc_timer.sld_design_entry.sci
.............\..\timer.asm.qmsg
.............\..\timer.asm_labs.ddb
.............\..\timer.cbx.xml
.............\..\timer.cmp.cdb
.............\..\timer.cmp.hdb
.............\..\timer.cmp.kpt
.............\..\timer.cmp.logdb
.............\..\timer.cmp.rdb
.............\..\timer.cmp.tdb
.............\..\timer.cmp0.ddb
.............\..\timer.dbp
.............\..\timer.db_info
.............\..\timer.eco.cdb
.............\..\timer.fit.qmsg
.............\..\timer.fnsim.hdb
.............\..\timer.fnsim.qmsg
.............\..\timer.hier_info
.............\..\timer.hif
.............\..\timer.map.cdb
.............\..\timer.map.hdb
.............\..\timer.map.logdb
.............\..\timer.map.qmsg
.............\..\timer.pre_map.cdb
.............\..\timer.pre_map.hdb
.............\..\timer.psp
.............\..\timer.rtlv.hdb
.............\..\timer.rtlv_sg.cdb
.............\..\timer.rtlv_sg_swap.cdb
.............\..\timer.sgdiff.cdb
.............\..\timer.sgdiff.hdb
.............\..\timer.signalprobe.cdb
.............\..\timer.sim.hdb
.............\..\timer.sim.qmsg
.............\..\timer.sld_design_entry.sci
.............\..\timer.sld_design_entry_dsc.sci
.............\..\timer.syn_hier_info
.............\..\timer.tan.qmsg
.............\..\wed.zsf
.............\LIB.DLS
.............\read me.txt
.............\svc_timer.qpf
.............\svc_timer.qws
.............\time.acf
.............\time.hif
.............\timer.acf
.............\timer.asm.rpt
.............\timer.cdf
.............\timer.done
.............\timer.dpf
.............\timer.fit
.............\timer.fit.rpt
.............\timer.fit.smsg
.............\timer.fit.summary
.............\timer.flow.rpt
.............\timer.hex
.............\timer.hif
.............\timer.jam
.............\timer.jbc
.............\timer.map.rpt
.............\timer.map.summary
.............\timer.mmf
.............\timer.ndb
.............\timer.pin
.............\timer.pof
.............\timer.qpf
.............\timer.qsf
.............\timer.qws
.............\timer.rpt
.............\timer.scf
.............\timer.snf
.............\timer.sof
.............\timer.tan.rpt
.............\timer.tan.summary
.............\timer.ttf
.............\timer.v
.............\timer.v.bak
.............\U0127638.DLS
.............\管脚分配说明.txt

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