Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop
Title: i2c_master_slave_core Download
 Description: I2C bus implementation of Verilog language, slightly modified to apply practical engineering
 Downloaders recently: [More information of uploader metallica]
 To Search:
  • [I2C] - IIC controller Verilog realize
  • [i2c_slave] - Minimal I2C Slave Device in a 32cell PLD
File list (Check if you may need any files):
i2c_master_slave_core
.....................\doc
.....................\...\i2c_spec.pdf
.....................\i2c_master_slave_core
.....................\.....................\doc
.....................\.....................\...\i2c_core_verification_plan.pdf
.....................\.....................\...\i2c_spec.pdf
.....................\.....................\verilog
.....................\.....................\.......\rtl
.....................\.....................\.......\...\controller_interface.v
.....................\.....................\.......\...\counter.v
.....................\.....................\.......\...\i2c_blk.v
.....................\.....................\.......\...\ms_core.v
.....................\.....................\.......\...\shift.v
.....................\verilog
.....................\.......\rtl
.....................\.......\...\controller_interface.v
.....................\.......\...\counter.v
.....................\.......\...\i2c_blk.v
.....................\.......\...\ms_core.v
.....................\.......\...\shift.v
    

CodeBus www.codebus.net