Description: RISC [reduced instruction setcomputer, Reduced Instruction Set Computer] is an implementation of fewer types of computer instructions to the microprocessor. VHDL source code are changed language in the FPGA on the run.
File list (Check if you may need any files):
risc核
......\alu.v
......\cpu.v
......\cpu_test.v
......\dram.v
......\exp.v
......\idec.v
......\pram.v
......\regs.v
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