clock The experimental realization of a can show h - CodeBus

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VHDL-FPGA-Verilog

Title: clock

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
1kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
297341729

Description: The experimental realization of a can show hours, minutes, seconds, digital clock (a special e-bay) Verilog source

Downloaders recently: [More information of uploader 297341729]

To Search: VERILOG CLOCK verilog digital clock

[VerilogDHLdigitalclock.Rar] - Verilog language used in the preparation
[examples] - Verilog clock divider ~ 50hmz, using bau
[clock] - Written using Verilog HDL Digital Clock,
[digitalclock] - digital clock Verilog

File list (Check if you may need any files):

clock
.....\贝一特电子clock.v

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