Description: I2C Slave module
The module contains N accessable Registers
when in read Process, all Registers are read at a time
when in write Process, only the addressed register are Writeable.
- [1.i2c_slave] - The slave end program of I2C is used to
- [I2C_vhdl] - i2c serial bus model. And some pdf in it
- [fet140_i2c_17] - MSP-FET430P140 Demo-I2C, Slave Reads/Wri
- [spi.tar] - SPI (serial port interface) of the Veril
- [USB_Video] - Section of a simple search through the e
- [cprogrammervi] - vi config and guide for c programmer qui
- [I2C_Verilog] - I2C controller Verilog source code examp
- [i2c_Sample] - Verilog CPLD achieved in i2c master-slav
- [i2c] - opencores the source, to help engage eve
- [iic_vhdl] - IIC bus controller VHDL realize- VHDL So
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