ethernet_tri_mode_rtl.tar Verilog realize asynchro

Title: ethernet_tri_mode_rtl.tar

Category:
VHDL-FPGA-Verilog
Tags:
[Linux] [C/C++] [源码]
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37.92kb
Update:
2008-10-13
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Description: Verilog realize asynchronous UART code, including the transmission module, receiver module, the baud rate can be configured, an additional PC-c code

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