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Prepared by using Verilog HDL source code 0832, 0832 to achieve the realization of D/A conversion. Also can be easily converted to VHDL source code.
Date : 2008-10-13 Size : 57.39kb User : 楼夏岚

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Clock chip DS1302 control driver. . . With PROTEUS schematic can be simulation. Good results
Date : 2008-10-13 Size : 76.96kb User : 郭明

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usb hardware size. Suitable for PCB to do when to do USB package reference
Date : 2008-10-13 Size : 243.64kb User : 郭明

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cy7c68013 bulk high-speed transmission experiment
Date : 2008-10-13 Size : 611.1kb User : xieyu

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CY7C68013 chip USB2.0 high-speed interrupt transmission experiment
Date : 2008-10-13 Size : 69.28kb User : xieyu

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USB2.0 chip cy7c68013 IO read and write transfer experiments
Date : 2008-10-13 Size : 144.08kb User : xieyu

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Serial transmission procedure used in ST series single-chip microcomputer uPSD
Date : 2008-10-13 Size : 22.51kb User : 唐润平

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Short-term load forecasting (a kind of wavelet transform based on support vector machine load forecasting procedure)
Date : 2008-10-13 Size : 914byte User : bill

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USB2.0 chip CY7C68013 request transmission experiments manufacturers
Date : 2008-10-13 Size : 74.8kb User : xieyu

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Enterprise Personnel Management System designed graduation hope everyone useful
Date : 2008-10-13 Size : 2.07mb User : chenliying

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Used for performance management, have any questions, please noted that the
Date : 2008-10-13 Size : 3.47kb User : Lebron

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Data structures including arrays (Array package) and the binary tree (Tree) list (Linelist package), etc.
Date : 2008-10-13 Size : 16.94kb User : zg
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