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CY7C68013 chip USB2.0 speed test, chip-side code 68013
Date : 2008-10-13 Size : 89.63kb User : xieyu

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Verilog HDL send serial procedures, ACTEL Fusion FPGA in the success of the experiment, and share with everyone! ^ _ ^
Date : 2008-10-13 Size : 1.56kb User : whq

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Verilog serial receive process, ACTEL Fusion FPGA in the experimental success and share with everyone! ^ _ ^
Date : 2008-10-13 Size : 1.54kb User : whq

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FPGA-driven 1602LCD procedures, the success of the experiment on-board experiments, and the U.S. to share! ^ _ ^
Date : 2008-10-13 Size : 2.52kb User : whq

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Display module, using 51 single-chip UART port communications, has C language program, protel99se schematics, PCB design needs
Date : 2008-10-13 Size : 15.89kb User : 唐润平

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pca matlab pca matlab
Date : 2008-10-13 Size : 1.67kb User : zzx

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FPGA in the study of bi-directional IO port. Pdf. And everyone to share! ^ _ ^
Date : 2008-10-13 Size : 113.7kb User : whq

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Signal measurement in real-time display the keyboard scanning delay 2 seconds
Date : 2008-10-13 Size : 25.22kb User : 丁涛

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CSR Bluetooth chip procedures ftp client server-side code has already been uploaded
Date : 2008-10-13 Size : 49.5kb User : lmc

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VC++ 6.0 procedures for small game, in the hope that the comrades wanted to learn the game has to help.
Date : 2008-10-13 Size : 18.21kb User : shenshen

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VC++ 6.0 procedures for small game, in the hope that the comrades wanted to learn the game has to help.
Date : 2008-10-13 Size : 18.15kb User : shenshen

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VC++ 6.0 procedures for small game, in the hope that the comrades wanted to learn the game has to help.
Date : 2008-10-13 Size : 17.71kb User : shenshen
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