FPGA and SOPC based on the use of VHDL language EDA sampling high-speed A/D of the storage oscilloscope

EXPT12_5_RSV
............\cmp_state.ini
............\DATA
............\....\LUT8X10.HEX
............\....\LUT8X10.MIF
............\db
............\..\RESERV.db_info
............\..\RESERV.project.hdb
............\DPRAM.VHD
............\README
............\......\GW48使用readme.txt
............\RESERV.ACF
............\RESERV.asm.rpt
............\RESERV.CDF
............\RESERV.done
............\RESERV.fit.summary
............\RESERV.flow.rpt
............\RESERV.HIF
............\RESERV.map.rpt
............\RESERV.map.summary
............\RESERV.PIN
............\RESERV.QPF
............\RESERV.QSF
............\RESERV.QWS
............\RESERV.SOF
............\RESERV.tan.summary
............\RESERV.VHD
............\RRR.VHD
............\serv_req_info.txt
............\STP1.STP

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