Turbo Decoder Release 0.3* Double binary, DVB-RCS code* Soft Output Viterbi Algorithm* M yHDL cycle/bit accurate model* Synthesizable VHDL model

turbo[1]
........\doc
........\...\LICENSE.txt
........\...\README.txt
........\...\turbo.pdf
........\makeDist
........\src
........\...\myhdl
........\...\.....\acs.py
........\...\.....\args.py
........\...\.....\clock.py
........\...\.....\coder.py
........\...\.....\distances.py
........\...\.....\extInf.py
........\...\.....\interleaver.py
........\...\.....\iteration.py
........\...\.....\launchTurbo.py
........\...\.....\limiter.py
........\...\.....\misc.py
........\...\.....\noiser.py
........\...\.....\permut.py
........\...\.....\punct.py
........\...\.....\select.py
........\...\.....\sova.py
........\...\.....\synthesis.py
........\...\.....\testbench.py
........\...\.....\trellis.py
........\...\.....\turboTop.py
........\...\vhdl
........\...\....\abPermut_e.vhd
........\...\....\abPermut_synth.vhd
........\...\....\accDistSel_e.vhd
........\...\....\accDistSel_synth.vhd
........\...\....\accDist_e.vhd
........\...\....\accDist_synth.vhd
........\...\....\acs_e.vhd
........\...\....\acs_synth.vhd
........\...\....\adder_e.vhd
........\...\....\adder_synth.vhd
........\...\....\clkDiv_e.vhd
........\...\....\clkDiv_synth.vhd
........\...\....\clkrst_beh.vhd
........\...\....\clkrst_e.vhd
........\...\....\cmp2_e.vhd
........\...\....\cmp2_synth.vhd
........\...\....\cod2_e.vhd
........\...\....\cod2_synth.vhd
........\...\....\cod3_e.vhd
........\...\....\cod3_synth.vhd
........\...\....\coder_e.vhd
........\...\....\coder_synth.vhd
........\...\....\delayer_e.vhd
........\...\....\delayer_synth.vhd
........\...\....\distances_e.vhd
........\...\....\distances_synth.vhd
........\...\....\distance_e.vhd
........\...\....\distance_synth.vhd
........\...\....\extInf_e.vhd
........\...\....\extInf_synth.vhd
........\...\....\interleaver_e.vhd
........\...\....\interleaver_synth.vhd
........\...\....\iteration_e.vhd
........\...\....\iteration_synth.vhd
........\...\....\limiter_e.vhd
........\...\....\limiter_synth.vhd
........\...\....\min4_e.vhd
........\...\....\min4_synth.vhd
........\...\....\min8_e.vhd
........\...\....\min8_synth.vhd
........\...\....\mux2_e.vhd
........\...\....\mux2_synth.vhd
........\...\....\mux4_e.vhd
........\...\....\mux4_synth.vhd
........\...\....\mux8_e.vhd
........\...\....\mux8_synth.vhd
........\...\....\opposite_e.vhd
........\...\....\opposite_synth.vhd
........\...\....\partDistance_e.vhd
........\...\....\partDistance_synth.vhd
........\...\....\punct_e.vhd
........\...\....\punct_synth.vhd
........\...\....\reduction_e.vhd
........\...\....\reduction_synth.vhd
........\...\....\reg_e.vhd
........\...\....\reg_synth.vhd
........\...\....\sova_e.vhd
........\...\....\sova_synth.vhd
........\...\....\stateSel_e.vhd
........\...\....\stateSel_synth.vhd
........\...\....\subs_e.vhd
........\...\....\subs_synth.vhd
........\...\....\trellis1_e.vhd
........\...\....\trellis1_synth.vhd
........\...\....\trellis2_e.vhd
........\...\....\trellis2_synth.vhd
........\...\....\turboDec_e.vhd
........\...\....\turboDec_synth.vhd
........\...\....\turbopack.vhd
........\...\....\zPermut_e.vhd
........\...\....\zPermut_synth.vhd

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