maxplus2 achieved using a common logic modules, background is a DSP-based embedded development board, the above logic modules throughout cpld achieve. This module can be embedded for the future development for reference.

CPLDNEW
.......\1gdf.acf
.......\1gdf.gdf
.......\1gdf.hif
.......\cmp_state.ini
.......\cpld.acf
.......\cpld.hif
.......\cpld4gdf.acf
.......\cpld4gdf.fit
.......\cpld4gdf.gdf
.......\cpld4gdf.hif
.......\cpld4gdf.jam
.......\cpld4gdf.jbc
.......\cpld4gdf.mmf
.......\cpld4gdf.ndb
.......\cpld4gdf.pin
.......\cpld4gdf.pof
.......\cpld4gdf.rpt
.......\cpld4gdf.snf
.......\cpld4gdf00.asm.rpt
.......\cpld4gdf00.bdf
.......\cpld4gdf00.done
.......\cpld4gdf00.fit.eqn
.......\cpld4gdf00.fit.rpt
.......\cpld4gdf00.fit.summary
.......\cpld4gdf00.fld
.......\cpld4gdf00.flow.rpt
.......\cpld4gdf00.map.eqn
.......\cpld4gdf00.map.rpt
.......\cpld4gdf00.map.summary
.......\cpld4gdf00.pin
.......\cpld4gdf00.pof
.......\cpld4gdf00.ppl
.......\cpld4gdf00.qpf
.......\cpld4gdf00.qsf
.......\cpld4gdf00.qws
.......\cpld4gdf00.tan.rpt
.......\cpld4gdf00.tan.summary
.......\cpldtest.acf
.......\cpldtest.fit
.......\cpldtest.gdf
.......\cpldtest.hif
.......\cpldtest.jam
.......\cpldtest.jbc
.......\cpldtest.mmf
.......\cpldtest.ndb
.......\cpldtest.pin
.......\cpldtest.pof
.......\cpldtest.rpt
.......\cpldtest.snf
.......\db
.......\..\cpld4gdf00.asm.qmsg
.......\..\cpld4gdf00.cbx.xml
.......\..\cpld4gdf00.cmp.cdb
.......\..\cpld4gdf00.cmp.hdb
.......\..\cpld4gdf00.cmp.rdb
.......\..\cpld4gdf00.cmp.tdb
.......\..\cpld4gdf00.cmp0.ddb
.......\..\cpld4gdf00.db_info
.......\..\cpld4gdf00.eco.cdb
.......\..\cpld4gdf00.fit.qmsg
.......\..\cpld4gdf00.hier_info
.......\..\cpld4gdf00.hif
.......\..\cpld4gdf00.map.cdb
.......\..\cpld4gdf00.map.hdb
.......\..\cpld4gdf00.map.qmsg
.......\..\cpld4gdf00.pre_map.cdb
.......\..\cpld4gdf00.pre_map.hdb
.......\..\cpld4gdf00.psp
.......\..\cpld4gdf00.rtlv.hdb
.......\..\cpld4gdf00.rtlv_sg.cdb
.......\..\cpld4gdf00.rtlv_sg_swap.cdb
.......\..\cpld4gdf00.sgdiff.cdb
.......\..\cpld4gdf00.sgdiff.hdb
.......\..\cpld4gdf00.sld_design_entry.sci
.......\..\cpld4gdf00.sld_design_entry_dsc.sci
.......\..\cpld4gdf00.syn_hier_info
.......\..\cpld4gdf00.tan.qmsg
.......\hc245.vhd
.......\LIB.DLS
.......\tri.tdf
.......\tri_gate.acf
.......\tri_gate.fit
.......\tri_gate.hif
.......\tri_gate.jam
.......\tri_gate.jbc
.......\tri_gate.mmf
.......\tri_gate.ndb
.......\tri_gate.pin
.......\tri_gate.pof
.......\tri_gate.rpt
.......\tri_gate.snf
.......\TRI_GATE.sym
.......\TRI_GATE.vhd
.......\u1.acf
.......\u1.fit
.......\u1.hif
.......\U1.inc
.......\u1.jam
.......\u1.jbc

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