the development process is targeted mainly LCD design of the Multi-rate Initialization

niosII_cyclone_1c20
...................\quartus_project
...................\...............\11.flow.rpt
...................\...............\11.map.rpt
...................\...............\11.map.summary
...................\...............\11.qpf
...................\...............\11.qsf
...................\...............\11.qws
...................\...............\button_pio.v
...................\...............\cmp_state.ini
...................\...............\component_builder_logfile.txt
...................\...............\cpu.ocp
...................\...............\cpu.v
...................\...............\cpu_jtag_debug_module.v
...................\...............\cpu_jtag_debug_module_wrapper.v
...................\...............\cpu_ociram_default_contents.mif
...................\...............\cpu_test_bench.v
...................\...............\db
...................\...............\..\11.cmp.rdb
...................\...............\..\11.db_info
...................\...............\..\11.eco.cdb
...................\...............\..\11.hif
...................\...............\..\11.map.hdb
...................\...............\..\11.map.qmsg
...................\...............\..\11.sld_design_entry.sci
...................\...............\..\11.sld_design_entry_dsc.sci
...................\...............\..\11_cmp.qrpt
...................\...............\first_nios2_system.bsf
...................\...............\first_nios2_system.ptf
...................\...............\first_nios2_system.v
...................\...............\first_nios2_system_generation_script
...................\...............\first_nios2_system_log.txt
...................\...............\first_nios2_system_setup_quartus_native_synthesis.tcl
...................\...............\first_nios2_system_sim
...................\...............\......................\atail-f.pl
...................\...............\......................\jtag_uart_input_mutex.dat
...................\...............\......................\jtag_uart_input_stream.dat
...................\...............\......................\jtag_uart_output_stream.dat
...................\...............\ic_tag_ram.mif
...................\...............\jtag_uart.v
...................\...............\lcd_pio.v
...................\...............\led_pio.v
...................\...............\reconfig_request_pio.v
...................\...............\rf_ram_a.mif
...................\...............\rf_ram_b.mif
...................\...............\seven_seg_pio.v
...................\...............\sopc_builder_debug_log.txt
...................\...............\system.ptf.4.01
...................\...............\system_timer.v

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