many verilog source codes, include a lot of small electrocircuit.

VERILOG_CODE
............\ADD_BEH.V
............\ADD_RTL.V
............\ADD_SIM.V
............\AFIFO.ACF
............\AFIFO.HIF
............\AFIFO.MMF
............\AFIFO.V
............\AFIFO_BEH.V
............\AFIFO_RTL.ACF
............\AFIFO_RTL.HIF
............\AFIFO_RTL.MMF
............\AFIFO_RTL.V
............\AFIFO_SIM.V
............\CHECKSUM.V
............\CHECK_SIM.V
............\CNT_BEH.V
............\CNT_RTL.V
............\CNT_SIM.V
............\CRC_BEH.V
............\CRC_RTL.V
............\CRC_SIM.V
............\DRAMCON_BEH.V
............\DRAMCON_RTL.V
............\DRAMCON_SIM.V
............\DUAL.V
............\DUAL_SIM.V
............\ENCR-RTL.ACF
............\ENCR-RTL.HIF
............\ENCR-RTL.V
............\ENCRYPTATION.ACF
............\ENCRYPTATION.FIT
............\ENCRYPTATION.HEX
............\ENCRYPTATION.HIF
............\ENCRYPTATION.MMF
............\ENCRYPTATION.NDB
............\ENCRYPTATION.PIN
............\ENCRYPTATION.POF
............\ENCRYPTATION.RPT
............\ENCRYPTATION.SNF
............\ENCRYPTATION.SOF
............\ENCRYPTATION.TTF
............\ENCRYPTATION.V
............\ENCR_BEH.V
............\ENCR_RTL.ACF
............\ENCR_RTL.HIF
............\ENCR_RTL.MMF
............\ENCR_RTL.V
............\ENCR_SIM.V
............\FPDRAMCON_BEH.V
............\FPDRAMCON_RTL.V
............\FULLCASE.V
............\FULLCASE1.V
............\FULLCASE2.V
............\HAMDEC.V
............\HAMGEN.V
............\HAM_SIM.V
............\JK_BEH.V
............\JK_RTL.V
............\JK_SIM.V
............\LFSR2_BEH.V
............\LFSR2_RTL.V
............\LFSR_BEH.V
............\LFSR_RTL.V
............\LFSR_SIM.V
............\LIB.DLS
............\MEALY_BEH.V
............\MEALY_RTL.V
............\MONO.V
............\MONO2.V
............\MONO_SIM.V
............\MOORE2_RTL.V
............\MOORE_BEH.V
............\MOORE_RTL.V
............\NORACE.V
............\ONEHOT_RTL.V
............\OPT.V
............\PAR.V
............\PAR_SIM.V
............\PLL_BEH.V
............\PLL_RTL.V
............\PLL_SIM.V
............\RAM.V
............\RAM_SIM.V
............\SFIFO_BEH.V
............\SFIFO_RTL.V
............\SFIFO_SIM.V
............\SHIFT_BEH.V
............\SHIFT_RTL.V
............\SHIFT_SIM.V
............\SMULTIPLY1_RTL.V
............\SMULTIPLY2_RTL.V
............\SMULTIPLY3_RTL.V
............\SMULTIPLY_BEH.V
............\SMULTIPLY_SIM.V
............\SM_ROM.V
............\SRAMCON_BEH.V
............\SRAMCON_RTL.V
............\SRAMCON_SIM.V
............\SSRAMCON_BEH.V

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