Introduction - If you have any usage issues, please Google them yourself
his work describes an approximate DCT architec-
ture for the High Efficiency Video Coding (HEVC) standard.
Since the standard requires to support multiple block sizes,
architectures based on exact implementation require a relevant
amount of hardware resources, namely multipliers and adders.
This work aims to reduce the amount of hardware resources
while keeping the rate-distortion performance nearly optimal.