Describes the Verilog implementation of the DDS signal generator, which can be verified by FPGA, including code implementation and writing. Code can be verified by the Altera EDA tool, you can achieve the basic functions of the signal generator. I hope you will cherish and study well.

DDS
DDS\prj
DDS\prj\db
DDS\prj\db\DDS.cbx.xml
DDS\prj\db\DDS.cmp.rdb
DDS\prj\db\DDS.cmp_merge.kpt
DDS\prj\db\DDS.db_info
DDS\prj\db\DDS.hier_info
DDS\prj\db\DDS.hif
DDS\prj\db\DDS.lpc.html
DDS\prj\db\DDS.lpc.rdb
DDS\prj\db\DDS.lpc.txt
DDS\prj\db\DDS.map.bpm
DDS\prj\db\DDS.map.cdb
DDS\prj\db\DDS.map.hdb
DDS\prj\db\DDS.map.kpt
DDS\prj\db\DDS.map.qmsg
DDS\prj\db\DDS.map_bb.cdb
DDS\prj\db\DDS.map_bb.hdb
DDS\prj\db\DDS.pre_map.cdb
DDS\prj\db\DDS.pre_map.hdb
DDS\prj\db\DDS.rpp.qmsg
DDS\prj\db\DDS.rtlv.hdb
DDS\prj\db\DDS.rtlv_sg.cdb
DDS\prj\db\DDS.rtlv_sg_swap.cdb
DDS\prj\db\DDS.sgate.rvd
DDS\prj\db\DDS.sgate_sm.rvd
DDS\prj\db\DDS.sgdiff.cdb
DDS\prj\db\DDS.sgdiff.hdb
DDS\prj\db\DDS.sld_design_entry.sci
DDS\prj\db\DDS.sld_design_entry_dsc.sci
DDS\prj\db\DDS.smart_action.txt
DDS\prj\db\DDS.syn_hier_info
DDS\prj\db\DDS.tis_db_list.ddb
DDS\prj\db\DDS.tmw_info
DDS\prj\db\logic_util_heursitic.dat
DDS\prj\DDS.done
DDS\prj\DDS.flow.rpt
DDS\prj\DDS.map.rpt
DDS\prj\DDS.map.summary
DDS\prj\DDS.qpf
DDS\prj\DDS.qsf
DDS\prj\incremental_db
DDS\prj\incremental_db\compiled_partitions
DDS\prj\incremental_db\compiled_partitions\DDS.db_info
DDS\prj\incremental_db\compiled_partitions\DDS.root_partition.map.cdb
DDS\prj\incremental_db\compiled_partitions\DDS.root_partition.map.dpi
DDS\prj\incremental_db\compiled_partitions\DDS.root_partition.map.hbdb.cdb
DDS\prj\incremental_db\compiled_partitions\DDS.root_partition.map.hbdb.hb_info
DDS\prj\incremental_db\compiled_partitions\DDS.root_partition.map.hbdb.hdb
DDS\prj\incremental_db\compiled_partitions\DDS.root_partition.map.hbdb.sig
DDS\prj\incremental_db\compiled_partitions\DDS.root_partition.map.hdb
DDS\prj\incremental_db\compiled_partitions\DDS.root_partition.map.kpt
DDS\prj\incremental_db\README
DDS\rtl
DDS\rtl\DDS.v
DDS\rtl\greybox_tmp
DDS\rtl\greybox_tmp\cbx_args.txt

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