XUAI interface principle, specification, IP core, code, etc

XAUI\Bitstreams
XAUI\Bitstreams\ispvm.xcf
XAUI\Bitstreams\xaui_demo.bit
XAUI\Bitstreams\xaui_demo.pad
XAUI\Bitstreams\xaui_demo.twr
XAUI\Docs
XAUI\Docs\UG23.pdf
XAUI\ORCAstra Plug-ins
XAUI\ORCAstra Plug-ins\8000
XAUI\ORCAstra Plug-ins\8000\EyeDemo.vbs
XAUI\ORCAstra Plug-ins\8000\EyeDemo.vis
XAUI\ORCAstra Plug-ins\8000\EyeDemo_imgX(1).bmp
XAUI\ORCAstra Plug-ins\8000\EyeDemo_J(1).bmp
XAUI\Sim
XAUI\Sim\Src
XAUI\Sim\Src\aaa_xaui_tb.v
XAUI\Src
XAUI\Src\IPExpress
XAUI\Src\IPExpress\CJPAT.lpc
XAUI\Src\IPExpress\CJPAT.srp
XAUI\Src\IPExpress\CJPAT.v
XAUI\Src\IPExpress\CJPAT_generate.log
XAUI\Src\IPExpress\CJPAT_tmpl.v
XAUI\Src\IPExpress\CRPAT.lpc
XAUI\Src\IPExpress\CRPAT.srp
XAUI\Src\IPExpress\CRPAT.v
XAUI\Src\IPExpress\CRPAT_generate.log
XAUI\Src\IPExpress\CRPAT_tmpl.v
XAUI\Src\IPExpress\msg_file.log
XAUI\Src\IPExpress\SCCJPATX4.mem
XAUI\Src\IPExpress\SCCRPATX4.mem
XAUI\Src\IPExpress\tb_CJPAT_tmpl.v
XAUI\Src\IPExpress\tb_CRPAT_tmpl.v
XAUI\Src\IPExpress\Xaui_0.lpc
XAUI\Src\IPExpress\Xaui_0.naf
XAUI\Src\IPExpress\Xaui_0.pp
XAUI\Src\IPExpress\Xaui_0.readme
XAUI\Src\IPExpress\xaui_0.sym
XAUI\Src\IPExpress\Xaui_0.tft
XAUI\Src\IPExpress\Xaui_0.txt
XAUI\Src\IPExpress\Xaui_0.v
XAUI\Src\IPExpress\Xaui_0_generate.log
XAUI\Src\Source
XAUI\Src\Source\cjpat_chk.v
XAUI\Src\Source\cjpat_gen.v
XAUI\Src\Source\cjpat_genchk.v
XAUI\Src\Source\crpat_chk.v
XAUI\Src\Source\crpat_gen.v
XAUI\Src\Source\crpat_genchk.v
XAUI\Src\Source\dcfifo_vector.v
XAUI\Src\Source\ecp3m_orcastra.old.v
XAUI\Src\Source\ecp3m_orcastra.v
XAUI\Src\Source\ECP3_top.v
XAUI\Src\Source\fixbyteshift.v
XAUI\Src\Source\orcastra_hub.v
XAUI\Src\Source\ORCAstra_SCI_Decode.v
XAUI\Src\Source\pcs_reset.v
XAUI\Src\Source\registers.v
XAUI\Src\Source\rx_reset_sm.v
XAUI\Src\Source\sci_decode.old.v
XAUI\Src\Source\sci_decode.v
XAUI\Src\Source\sw_ctrlstat.v
XAUI\Src\Source\test.v
XAUI\Src\Source\top_genchk.v
XAUI\Src\Source\tx_reset_sm.v
XAUI\Target
XAUI\Target\myactive.do
XAUI\Target\newwave.do
XAUI\Target\Xaui_0.txt
XAUI\Target\xaui_demo.lpf
XAUI\Target\Xaui_Demo.syn
XAUI\XAUI_IP
XAUI\XAUI_IP\XAUI_1_5_core
XAUI\XAUI_IP\XAUI_1_5_core\generate_core.tcl
XAUI\XAUI_IP\XAUI_1_5_core\pmi_distributed_dpramEbnoner12532.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_distributed_dpramEbnoner12532_0.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_distributed_dpramEbnoner12532_1.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_distributed_dpramEbnoner12532_2.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_distributed_dpramEbnoner12532_3.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_distributed_dpramEbnoner12532_4.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_distributed_dpramEbnoner12532_5.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_distributed_dpramEbnoner12532_6.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_fifo_dcEEar11212802562562567272.ngo
XAUI\XAUI_IP\XAUI_1_5_core\pmi_fifo_dcEEar11212802562562567272_0.ngo
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core.lpc
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core.ngo
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core.v
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_bb.v
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_beh.v
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\eval_sim_readme.txt
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\models
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\models\sim
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\models\sim\ecp2m
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\models\sim\ecp2m\xgxs_frm_top.v
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\models\sim\ecp3
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\models\sim\ecp3\xgxs_frm_top.v
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\params
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\params\xgxs_define.v
XAUI\XAUI_IP\XAUI_1_5_core\xaui_core_eval\readme.htm

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