The output clock signal ACLK is used to simulate the external pulse level, using the capture / comparator 1 to P2.0 Pulse width measurement, where the subsystem SMCLK clock is used as a count. The formula of measuring pulse width is [overflow*65535+ (end-start)]*SMclk (cycle) MCLK:8MHz SCLK:1MHz ACLK:32768Hz/8 The sensing signal (frequency: 1/[32768/8)]* (1/2) = high level time Reference signal measurement: (end-start)]*SMclk (1/1M) =122/10^6 Description: connect the P2.0 pin to the P1.2 pin

Widthcapture
Widthcapture\12864.c
Widthcapture\12864.h
Widthcapture\Debug
Widthcapture\Debug\Exe
Widthcapture\Debug\Exe\lh.d43
Widthcapture\Debug\Exe\lh2.d43
Widthcapture\Debug\Exe\Widthcapture.d43
Widthcapture\Debug\List
Widthcapture\Debug\Obj
Widthcapture\Debug\Obj\12864.pbi
Widthcapture\Debug\Obj\12864.r43
Widthcapture\Debug\Obj\adc12.r43
Widthcapture\Debug\Obj\delay.pbi
Widthcapture\Debug\Obj\delay.r43
Widthcapture\Debug\Obj\key44.r43
Widthcapture\Debug\Obj\lh.pbd
Widthcapture\Debug\Obj\lh2.pbd
Widthcapture\Debug\Obj\main.r43
Widthcapture\Debug\Obj\pwm_timeb.r43
Widthcapture\Debug\Obj\Width measurement.pbi
Widthcapture\Debug\Obj\Width measurement.r43
Widthcapture\Debug\Obj\Widthcapture.pbd
Widthcapture\delay.c
Widthcapture\delay.h
Widthcapture\path.txt
Widthcapture\settings
Widthcapture\settings\lh.cspy.bat
Widthcapture\settings\lh.dbgdt
Widthcapture\settings\lh.dni
Widthcapture\settings\lh.wsdt
Widthcapture\settings\lh2.cspy.bat
Widthcapture\settings\lh2.dbgdt
Widthcapture\settings\lh2.dni
Widthcapture\settings\lh2.wsdt
Widthcapture\settings\picture12864.wsdt
Widthcapture\settings\Widthcapture.cspy.bat
Widthcapture\settings\Widthcapture.dbgdt
Widthcapture\settings\Widthcapture.dni
Widthcapture\settings\Widthcapture.wsdt
Widthcapture\Width measurement.c
Widthcapture\Widthcapture.dep
Widthcapture\Widthcapture.ewd
Widthcapture\Widthcapture.ewp
Widthcapture\Widthcapture.eww

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