read and write the signal form CAN bus.

9067_test
.........\9067.aliases
.........\9067.lvlps
.........\9067.lvproj
.........\CAN Signals transeiver (FPGA).vi
.........\CAN Signals transeiver (Host) - 9067.vi
.........\Create_file.vi
.........\D70.dbc
.........\FPGA Bitfiles
.........\.............\9067_FPGA终端_CANSignalstranse_8rWp5tfLnyY.lvbitx
.........\.............\9067_FPGA终端_CANSignalstranse_jcd8UabY3oc.lvbitx
.........\.............\testCAN_FPGA终端_CANSignalstranse_BwGgNLmA7H4.lvbitx
.........\.............\testCAN_FPGA终端_CANSignalstranse_tyGyrnv8EzY.lvbitx
.........\Host_SubVI
.........\..........\Monitor_CAN.vi
.........\..........\Monitor_Frequency.vi
.........\..........\Monitor_High_Voltage.vi
.........\..........\Monitor_Temperature.vi
.........\..........\Monitor_Voltage.vi
.........\little_endian.vi
.........\PC_Host.vi
.........\Save_data.vi
.........\Scan_and_FPGA_Mode.vi
.........\SubVI
.........\.....\Acq_Frequency.vi
.........\.....\Acq_HighVol.vi
.........\.....\Acq_Temperature.vi
.........\.....\Acq_Voltage.vi
.........\SX-4.dbc
.........\Table_Name.vi
.........\Test_20150709_145850.xls
.........\Test_20150710_083153.xls
.........\Variable.lvlib

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