This is 2-BCD numbers Counter on board Altera DE2 Code Verilog HDL (You must import DE2_pin_assignments.csv to use this code)

counter.v
t_counter.v
lab4\BCD_decoder.v
....\BCD_decoder.v.bak
....\counter.v
....\counter.v.bak
....\db\lab4.asm.qmsg
....\..\lab4.asm_labs.ddb
....\..\lab4.cbx.xml
....\..\lab4.cmp.bpm
....\..\lab4.cmp.cdb
....\..\lab4.cmp.ecobp
....\..\lab4.cmp.hdb
....\..\lab4.cmp.kpt
....\..\lab4.cmp.logdb
....\..\lab4.cmp.rdb
....\..\lab4.cmp.tdb
....\..\lab4.cmp0.ddb
....\..\lab4.cmp_merge.kpt
....\..\lab4.db_info
....\..\lab4.eco.cdb
....\..\lab4.fit.qmsg
....\..\lab4.hier_info
....\..\lab4.hif
....\..\lab4.map.bpm
....\..\lab4.map.cdb
....\..\lab4.map.ecobp
....\..\lab4.map.hdb
....\..\lab4.map.kpt
....\..\lab4.map.logdb
....\..\lab4.map.qmsg
....\..\lab4.map_bb.cdb
....\..\lab4.map_bb.hdb
....\..\lab4.map_bb.hdbx
....\..\lab4.map_bb.logdb
....\..\lab4.pre_map.cdb
....\..\lab4.pre_map.hdb
....\..\lab4.psp
....\..\lab4.rtlv.hdb
....\..\lab4.rtlv_sg.cdb
....\..\lab4.rtlv_sg_swap.cdb
....\..\lab4.sgdiff.cdb
....\..\lab4.sgdiff.hdb
....\..\lab4.sld_design_entry.sci
....\..\lab4.sld_design_entry_dsc.sci
....\..\lab4.syn_hier_info
....\..\lab4.tan.qmsg
....\..\lab4.tis_db_list.ddb
....\..\lab4.tmw_info
....\..\prev_cmp_lab4.asm.qmsg
....\..\prev_cmp_lab4.fit.qmsg
....\..\prev_cmp_lab4.map.qmsg
....\..\prev_cmp_lab4.qmsg
....\..\prev_cmp_lab4.tan.qmsg
....\generator.v
....\generator.v.bak
....\incremental_db\compiled_partitions\lab4.root_partition.cmp.atm
....\..............\...................\lab4.root_partition.cmp.dfp
....\..............\...................\lab4.root_partition.cmp.hdbx
....\..............\...................\lab4.root_partition.cmp.kpt
....\..............\...................\lab4.root_partition.cmp.logdb
....\..............\...................\lab4.root_partition.cmp.rcf
....\..............\...................\lab4.root_partition.map.atm
....\..............\...................\lab4.root_partition.map.dpi
....\..............\...................\lab4.root_partition.map.hdbx
....\..............\...................\lab4.root_partition.map.kpt
....\..............\README
....\lab4.asm.rpt
....\lab4.done
....\lab4.fit.rpt
....\lab4.fit.summary
....\lab4.flow.rpt
....\lab4.map.rpt
....\lab4.map.smsg
....\lab4.map.summary
....\lab4.pin
....\lab4.pof
....\lab4.qpf
....\lab4.qsf
....\lab4.qsf.bak
....\lab4.qws
....\lab4.sof
....\lab4.tan.rpt
....\lab4.tan.summary
....\lab4.v
....\lab4.v.bak
....\lab4test.cr.mti
....\lab4test.mpf
....\tb_counter.v
....\tb_counter.v.bak
....\tb_counter.vhd
....\vsim.wlf
....\work\counter\verilog.prw
....\....\.......\verilog.psm
....\....\.......\_primary.dat
....\....\.......\_primary.dbs
....\....\.......\_primary.vhd
....\....\tb_counter\verilog.prw
....\....\..........\verilog.psm
....\....\..........\_primary.dat

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