Applications List Page 3773

Applications list

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Chan-VeseActiveContours Downloaded：0: Active contour segmentation
Date : 2025-09-19 Size : 964kb User : dave
imc Downloaded：0: This code calculates the imc of a person! the code is very easy but works! Thanks
Date : 2025-09-19 Size : 1kb User : Marcos Campana
Super_On_Top Downloaded：0: always on top, it s just common but super on top is very great. that s only our program is always on top of other application. not only on the top but just only our application can use. i think its very gud for all of u
Date : 2025-09-19 Size : 4kb User : zee
LiLunLiXueKeHouZuoYe Downloaded：0: Join necessary- theoretical mechanics after exercise. In great detail, suitable for undergraduate postgraduate Theoretical Mechanics exam review, is ideal for professional mechanics on the post-graduate refresher.
Date : 2025-09-19 Size : 10.5mb User : 吕广强
tushuguanlixitong Downloaded：0: Library management system. Features: 1, library 2, Book 3, add 4 new messages, delete old information to use to C language files
Date : 2025-09-19 Size : 18kb User : ls
dangan Downloaded：0: VB_ student records management system source code, can be worthy of study and reference
Date : 2025-09-19 Size : 235kb User : vic
Recog Downloaded：0: Handwritten Chinese character recognition is a source system, the method is relatively simple, suitable for beginners to learn and research, I hope you can help.
Date : 2025-09-19 Size : 12kb User : 吴文达
gcl.src.tar Downloaded：0: BOI version of Steiner tree construction, practical and popular for manhattan VLSI routing, generate a Steiner minimum tree for given set of terminals in a layout plane
Date : 2025-09-19 Size : 357kb User : Ernesto Liu
PTree.tar Downloaded：0: PTree: Find the optimum Steiner tree for a given terminal sequence. Linear runtime complexity. Optimum solution.
Date : 2025-09-19 Size : 137kb User : Ernesto Liu
buf_tree_pol.tar Downloaded：0: Construct buffered routing tree for VLSI interconnects in a Manhanttan layout plane for a given set of terminals, guarantee polarity of the terminals agree with each other
Date : 2025-09-19 Size : 33kb User : Ernesto Liu
Minaret.tar Downloaded：0: Minaret: retiming edge-triggered circuit for improved performance and higher clock frequency by moving combinational logic gates across sequential elements
Date : 2025-09-19 Size : 2.69mb User : Ernesto Liu
FengShui.tar Downloaded：0: FengShui: custom ASIC layout placement for gigascale VLSI circuits, for gate array, sea of gate and standard cell designs, scales well into million gate designs
Date : 2025-09-19 Size : 571kb User : Ernesto Liu

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