VHDL-FPGA-Verilog List Page 917

VHDL-FPGA-Verilog list

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tft_lcdPili9325 Downloaded：0: TFT driver, feel free to use it, after the test is in good condition, such as the original
Date : 2025-08-01 Size : 5.25mb User : 尤勇健
zynq_led_show Downloaded：0: On the PlanAhead and SDK14.4 do a small program Zynq-7020 is designed to be familiar with the development environment and processes.
Date : 2025-08-01 Size : 3.45mb User : 郝教授
2stOTA Downloaded：0: Two operational amplifiers with Miller compensation effect achieved schematics, CMOS
Date : 2025-08-01 Size : 98kb User : zzt
2stageMillerC2012v6 Downloaded：0: Two operational amplifiers with Miller compensation effect achieved schematics, code implemented in Hspice
Date : 2025-08-01 Size : 1kb User : zzt
tb_asy_fifo Downloaded：0: test the logic function of asynchronous fifo
Date : 2025-08-01 Size : 1kb User : 张余
vhdl_lcd_12_17 Downloaded：0: Lcd display with vhdl language program, the program after downloading verification
Date : 2025-08-01 Size : 384kb User : wangyong
EDAlabor3 Downloaded：0: Half adder to full adder, 8421 yards to geleima conversion.
Date : 2025-08-01 Size : 182kb User : wellsun
singleCPU Downloaded：0: With single-cycle CPU Verilog implementation, respectively, to achieve type I, R, J-type instruction, and includes test files. For reference.
Date : 2025-08-01 Size : 6.97mb User : 孔晗聪
muCPU_final Downloaded：0: Using Verilog development of multi-cycle CPU, mips executable compilation of R \ I \ J-type instruction, with a high reference value.
Date : 2025-08-01 Size : 1.96mb User : 孔晗聪
i2c_7113 Downloaded：0: Config the SAF7113 via I2C,write in VHDL.
Date : 2025-08-01 Size : 3kb User : likai
fpgawritetoram Downloaded：0: FPGA write data to ram in 32bit data bus,write in VHDL.
Date : 2025-08-01 Size : 1kb User : likai
sequential-detector Downloaded：0: With a state machine sequence detector design, and its simulation and hardware testing
Date : 2025-08-01 Size : 1kb User : 梦

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