VHDL-FPGA-Verilog List Page 912

VHDL-FPGA-Verilog list

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ps2_keyboard_test Downloaded：0: FPGA receives data via the keyboard ps2, and then received the letters A through Z keys corresponding conversion ASII code sent to the PC via the serial port. Experiment, you need to pick a keyboard, but also with debugg
Date : 2025-07-31 Size : 1kb User : jame
uart Downloaded：0: Open the PC serial debugging assistant, to send a character to the development board (middle connected by a serial line) After the FPGA received character is sent back to the PC, is displayed on the serial assistant
Date : 2025-07-31 Size : 1kb User : jame
beep Downloaded：0: Buzzer output alarm sound experiment Drops. . Drops. .
Date : 2025-07-31 Size : 1kb User : jame
i2c_4163okok Downloaded：0: Use of Altera s Qsys generation system on chip SOC, the use of the CPU I2C configuration circuitry.
Date : 2025-07-31 Size : 5.38mb User : 520yunping1314
EDA Downloaded：0: DIGTAL CLOCK
Date : 2025-07-31 Size : 5.38mb User : 李戴维
switch_9 Downloaded：0: use systemverilog write 4 port switch,you can learing systemverilog language
Date : 2025-07-31 Size : 60kb User : 田波
uvm_switch_8 Downloaded：0: use uvm set up testbench ,the mainly focuse is verification swtich,you can learning uvm sample fucntion
Date : 2025-07-31 Size : 60kb User : 田波
XN703A_PRX Downloaded：0: Southwest Integrated XN703A receiving end porting code, their transplant, did not delete some redundant code
Date : 2025-07-31 Size : 22.6mb User : Hhw
p21 Downloaded：0: mips pipeline source code, very simple, very suitable for beginners to use. University of grade three compulsory.
Date : 2025-07-31 Size : 5kb User : 张伟
DAC900 Downloaded：0: Write your own, FPGA as Cyclone ep1c12q240c8, dac chip is DAC900. Built-ram fpga store waveform data, waveform generated is sent to dac900. Written VerilogHDL.
Date : 2025-07-31 Size : 26.17mb User : xiexin
shumaguan-Verilog Downloaded：0: Simple digital circuit design implementation code verilog
Date : 2025-07-31 Size : 22kb User : 夏沐
IPRAM Downloaded：0: FPGA built-in RAM, which is called IP core tools to generate a dual port RAM, used to store data. You can then view the waveform or use SignalTAP II data.
Date : 2025-07-31 Size : 1.89mb User : xiexin

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