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singleCPU

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2013-11-24
  • Size : 6.97mb
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  • Author :孔****
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Introduction - If you have any usage issues, please Google them yourself
With single-cycle CPU Verilog implementation, respectively, to achieve type I, R, J-type instruction, and includes test files. For reference.
Packet file list
(Preview for download)


wang\Assembler.jar
....\CPU\CPU\.lso
....\...\...\alu.v
....\...\...\alu_ctl.v
....\...\...\coregen.cgp
....\...\...\coregen.log
....\...\...\coregen.rsp
....\...\...\CPU.ipf
....\...\...\CPU.ise
....\...\...\CPU.ntrc_log
....\...\...\CPU.restore
....\...\...\..._xdb\cst.xbcd
....\...\...\.......\tmp\ise\version
....\...\...\.......\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
....\...\...\.......\...\...\............\..................\.........\HDProject_StrTbl
....\...\...\.......\...\...\............\..................\__stored_object_table__
....\...\...\.......\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
....\...\...\.......\...\...\............\.........\.......\RunOnce_tcl_StrTbl
....\...\...\.......\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
....\...\...\.......\...\...\............\................\................\dpm_project_main_StrTbl
....\...\...\.......\...\...\............\................\................\NameMap
....\...\...\.......\...\...\............\................\................\NameMap_StrTbl
....\...\...\.......\...\...\............\................\__stored_objects__
....\...\...\.......\...\...\............\................\__stored_objects___StrTbl
....\...\...\.......\...\...\............\................\__stored_object_table__
....\...\...\.......\...\...\............\................Gui\GuiProjectData
....\...\...\.......\...\...\............\...................\GuiProjectData_StrTbl
....\...\...\.......\...\...\............\xreport\Gc_RvReportViewer-Current-Module
....\...\...\.......\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
....\...\...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-top
....\...\...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-top_StrTbl
....\...\...\.......\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
....\...\...\.......\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
....\...\...\.......\...\...\..REGISTRY__\Autonym\regkeys
....\...\...\.......\...\...\............\bitgen\regkeys
....\...\...\.......\...\...\............\common\regkeys
....\...\...\.......\...\...\............\.pldfit\regkeys
....\...\...\.......\...\...\............\dumpngdio\regkeys
....\...\...\.......\...\...\............\fuse\regkeys
....\...\...\.......\...\...\............\HierarchicalDesign\HDProject\regkeys
....\...\...\.......\...\...\............\..................\regkeys
....\...\...\.......\...\...\............\hprep6\regkeys
....\...\...\.......\...\...\............\idem\regkeys
....\...\...\.......\...\...\............\map\regkeys
....\...\...\.......\...\...\............\netgen\regkeys
....\...\...\.......\...\...\............\.gc2edif\regkeys
....\...\...\.......\...\...\............\...build\regkeys
....\...\...\.......\...\...\............\..dbuild\regkeys
....\...\...\.......\...\...\............\par\regkeys
....\...\...\.......\...\...\............\ProjectNavigator\regkeys
....\...\...\.......\...\...\............\................Gui\regkeys
....\...\...\.......\...\...\............\runner\regkeys
....\...\...\.......\...\...\............\SrcCtrl\regkeys
....\...\...\.......\...\...\............\.TE\bitgen\regkeys
....\...\...\.......\...\...\............\...\map\regkeys
....\...\...\.......\...\...\............\...\ngdbuild\regkeys
....\...\...\.......\...\...\............\...\par\regkeys
....\...\...\.......\...\...\............\...\regkeys
....\...\...\.......\...\...\............\...\trce\regkeys
....\...\...\.......\...\...\............\...\xst\regkeys
....\...\...\.......\...\...\............\taengine\regkeys
....\...\...\.......\...\...\............\.rce\regkeys
....\...\...\.......\...\...\............\.sim\regkeys
....\...\...\.......\...\...\............\vhpcomp\regkeys
....\...\...\.......\...\...\............\.logcomp\regkeys
....\...\...\.......\...\...\............\WebTalk\DesignDataCollection\regkeys
....\...\...\.......\...\...\............\.......\regkeys
....\...\...\.......
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