VHDL-FPGA-Verilog List Page 895

VHDL-FPGA-Verilog list

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single-CPU Downloaded：0: Single CPU clock design, spartan 3e board test passed, support some mips instruction, containing sample code and binary files mips
Date : 2025-07-29 Size : 15kb User : Chan Cheng
Puzzle Downloaded：0: A VGA display jigsaw puzzle with verilog written, the program is based on the Basys2 Xilinx development boards, the image is stored in ROM
Date : 2025-07-29 Size : 11.36mb User : Zic
i2c Downloaded：0: Based on the i2c bus protocol verilog
Date : 2025-07-29 Size : 240kb User : Zic
white Downloaded：0: Verilog VGA-based black and white test program can be run directly on the basys2 xilinx development board
Date : 2025-07-29 Size : 158kb User : Zic
FPGA_uart Downloaded：0: Using FPGA to achieve mutually send and receive serial data between computer
Date : 2025-07-29 Size : 266kb User : 11223
digital_clock Downloaded：0: FPGA digital clock, based verilogHDL
Date : 2025-07-29 Size : 3.81mb User : 童文飞
elevator Downloaded：0: elevator control system
Date : 2025-07-29 Size : 609kb User : cici
c_motor Downloaded：0: vhdl to DC motor controller General Procedure Different fpga/cpld, may need to modify some of the source code.
Date : 2025-07-29 Size : 3kb User : 李时针
ComplexMult Downloaded：0: xilinx ip nuclear complex multiplication vhdl language calling with test procedures
Date : 2025-07-29 Size : 656kb User : bambod
Divider Downloaded：0: xilinx ip nuclear division calls including test procedures vhdl language
Date : 2025-07-29 Size : 4.21mb User : bambod
Quartus-II-13.1-and-Verilog Downloaded：0: Quartus II 13.1 installation and the first to achieve break Verilog program.
Date : 2025-07-29 Size : 3.39mb User : xiaoqiao
naozhong Downloaded：0: can set a clock and warming time
Date : 2025-07-29 Size : 500kb User : xy

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