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VHDL-FPGA-Verilog list
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TI s DSP6713 collaborative ALTERA FPGA chip digital qpsk and FSK modulation and simulation test was successful.
Date : 2025-07-29 Size : 10.15mb User : luomeigang

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The use altera FPGA, using the DDS principle to achieve FM debugging, debugging coefficient can be changed through DA conversion output, simulation, and the lower plate test is successful
Date : 2025-07-29 Size : 3.04mb User : luomeigang

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TV converter based on EPM3064ATC44, for display digital data, Altera source code, PCAD source files
Date : 2025-07-29 Size : 1009kb User : prst

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VGA_SYNC is a part of VGA controller, base d on Spartan 3 chip, use for show bar color picture in screen
Date : 2025-07-29 Size : 1kb User : yang gao

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TB file for text VGA_SYNC
Date : 2025-07-29 Size : 1kb User : yang gao

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it is project achieves I2C bus
Date : 2025-07-29 Size : 501kb User : lyy

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We realize the FIR filter, and do the simulation, so that we can help functions for other programs, and our programs can also facilitate your work
Date : 2025-07-29 Size : 1.38mb User : lyy

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The signal channel is sampled and a synchronous phase-locked extraction using FPGA
Date : 2025-07-29 Size : 863kb User : zhao chuan

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Sdram controller suitable for beginners, including initialization, control, command writes the basic module, with detailed notes.
Date : 2025-07-29 Size : 5kb User : Xin

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Serial communication with fifo verilog design, which is used to learn uart complete PC sends data back to the original post fpga fpga, support long strings.
Date : 2025-07-29 Size : 147kb User : Xin

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The 4x4 matrix keypad scanning, including two languages ​ ​ VHDL and Verilog design code, suitable for beginners.
Date : 2025-07-29 Size : 1kb User : Xin

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Generating code using dds sine cosine signal, using the way of rom
Date : 2025-07-29 Size : 1.19mb User : shaojian
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